Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

Abstract: A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

Abstract: A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

Abstract: A grating coupler reflector (retro reflector) is formed within a photonics chip and includes a vertical scattering region, an optical waveguide, and a reflector. The optical waveguide is optically coupled to the vertical scattering region. The reflector is positioned at an end of the optical waveguide. The reflector is configured to reflect light that propagates through the optical waveguide from the vertical scattering region back toward the vertical scattering region. The location of the grating coupler reflector on the photonics chip is determinable by scanning a light emitting active optical fiber over the chip and detecting when light is reflected back into the active optical fiber from the grating coupler reflector. The determined location of the grating coupler reflector on the photonics chip is usable as a reference location for aligning optical fiber(s) to corresponding optical grating couplers on the photonics chip.

Abstract: A semiconductor wafer includes a semiconductor chip that includes a photonic device. The semiconductor chip includes an optical fiber attachment region in which an optical fiber alignment structure is to be fabricated. The optical fiber alignment structure is not yet fabricated in the optical fiber attachment region. The semiconductor chip includes an in-plane fiber-to-chip optical coupler positioned at an edge of the optical fiber attachment region. The in-plane fiber-to-chip optical coupler is optically connected to the photonic device. A sacrificial optical structure is optically coupled to the in-plane fiber-to-chip optical coupler. The sacrificial optical structure includes an out-of-plane optical coupler configured to receive input light from a light source external to the semiconductor chip. At least a portion of the sacrificial optical structure extends through the optical fiber attachment region.

Abstract: An intact semiconductor wafer (wafer) includes a plurality of die. Each die has a top layer including routings of conductive interconnect structures electrically isolated from each other by intervening dielectric material. A top surface of the top layer corresponds to a top surface of the wafer. Below the top layer, each die has a device layer including optical devices and electronic devices. Each die has a cladding layer below the device layer and on a substrate of the wafer. Each die includes a photonic test port within the device layer. For each die, a light transfer region is formed within the intact wafer to extend through the top layer to the photonic test port within the device layer. The light transfer region provides a window for transmission of light into and out of the photonic test port from and to a location on the top surface of the wafer.

Abstract: A grating coupler reflector (retro reflector) is formed within a photonics chip and includes a vertical scattering region, an optical waveguide, and a reflector. The optical waveguide is optically coupled to the vertical scattering region. The reflector is positioned at an end of the optical waveguide. The reflector is configured to reflect light that propagates through the optical waveguide from the vertical scattering region back toward the vertical scattering region. The location of the grating coupler reflector on the photonics chip is determinable by scanning a light emitting active optical fiber over the chip and detecting when light is reflected back into the active optical fiber from the grating coupler reflector. The determined location of the grating coupler reflector on the photonics chip is usable as a reference location for aligning optical fiber(s) to corresponding optical grating couplers on the photonics chip.

Abstract: Monolithically integrated optical resonators are disclosed. An optical resonator may be a nanopillar optical resonator that is formed directly on a substrate and promotes a helically-propagating cavity mode. The helically-propagating cavity mode may result in significant reflection or, total internal reflection at an interface of the nanopillar optical resonator and the substrate even if refractive indices of the nanopillar optical resonator and the substrate are the same or similar. As a result, strong optical feedback, and thus strong resonance, may be provided in the nanopillar optical resonator.

Abstract: Embodiments of a monolithically integrated optical resonator are disclosed. In one embodiment, the optical resonator is a nanopillar optical resonator that is formed directly on a substrate and promotes a helically-propagating cavity mode. The helically-propagating cavity mode results in significant reflection or, in some embodiments, total internal reflection at an interface of the nanopillar optical resonator and the substrate even if refractive indices of the nanopillar optical resonator and the substrate are the same or similar. As a result, strong optical feedback, and thus strong resonance, is provided in the nanopillar optical resonator.