Patents by Inventor Frédéric Bertholio

Frédéric Bertholio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7176062
    Abstract: A lead-frame method and assembly for interconnecting circuits within a circuit module allows a circuit module to be fabricated without a circuit board substrate. Integrated circuit dies are attached to a metal lead-frame assembly and the die interconnects are wire-bonded to interconnect points on the lead-frame assembly. An extension of the lead-frame assembly out of the circuit interconnect plane provides external electrical contacts for connection of the circuit module to a socket.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: February 13, 2007
    Assignee: Amkor Technology, Inc.
    Inventors: Jeffrey Alan Miks, Kenneth Kaskoun, Markus Liebhard, Donald Craig Foster, Paul Robert Hoffman, Frederic Bertholio
  • Patent number: 6900527
    Abstract: A lead-frame method and assembly for interconnecting circuits within a circuit module allows a circuit module to be fabricated without a circuit board substrate. Integrated circuit dies are attached to a metal lead-frame assembly and the die interconnects are wire-bonded to interconnect points on the lead-frame assembly. An extension of the lead-frame assembly out of the circuit interconnect plane provides external electrical contacts for connection of the circuit module to a socket.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: May 31, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Jeffrey Alan Miks, Kenneth Kaskoun, Markus Liebhard, Donald Craig Foster, Paul Robert Hoffman, Frederic Bertholio
  • Patent number: 6319827
    Abstract: An electronic micromodule includes a support wafer, and an integrated circuit chip on the support wafer. The integrated circuit chip includes electrical connector areas, and at least one insulation layer is on the support wafer and the integrated circuit chip. The insulation layer includes openings to the electrical connector areas. At least one flat winding defining a coil is on the insulation layer and is connected to the electrical connector areas. A conducting material is in in each of the openings through the insulation layer for connecting the coil to the electrical zconnector areas.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: November 20, 2001
    Assignee: Inside Technologies
    Inventors: Jacek Kowalski, Didier Serra, Frédéric Bertholio