Abstract: Technologies are provided for variable gain amplifiers (VGAs).

Abstract: A radio frequency transmission module is adapted to generate a first signal to be transmitted and to convert the signal to a radio frequency carrier for its radio transmission, in an operational phase, and is adapted to generate a second signal and to convert the second signal to the radio frequency carrier, in a calibration phase. The module includes a calibration unit having a subsampler adapted to subsample the second converted signal and a calculation unit adapted to calculate Fourier Transform coefficients representative of the signal delivered by the subsampler, for the purposes of processing the first signal to be transmitted, in the operational phase, as a function of at least some of the Fourier coefficients calculated in the calibration phase.

Abstract: An electronic device, includes sigma-delta modulation circuit to operate with a clock signal and having output circuitry to deliver a digital data signal. First circuitry delivers a radiofrequency transposition signal. A notch filter includes radiofrequency digital-to-analog conversion blocks, having first input circuitry coupled to the output circuitry. Second input circuitry receives the radiofrequency transposition signal. Second output circuitry delivers a radiofrequency analog signal. Digital delay circuitry is controlled by the clock signal and includes a delay block between the two first input circuits. The frequency of a notch of the notch filter is related to the value of the delay from the delay block. Summation circuitry sums the radiofrequency signals.

Abstract: A dual-conversion tuner firstly upconverts so as to place itself outside the receive band and then downconverts with zero intermediate frequency. A filter of the surface acoustic wave type is disposed between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block comprising a channel decoding module. With the exception of the surface acoustic wave filter, the components are entirely embodied in integrated fashion.

Abstract: A method for processing a digital signal includes an elementary processing including a radiofrequency transposition with a radiofrequency transposition signal and a digital to analog conversion of the transposed digital signal for delivering a radiofrequency analog signal. The digital to analog conversion is controlled by a control signal and a power control signal, the control signal having a frequency twice the frequency of the radiofrequency transposition signal. Each transition of the radiofrequency transposition signal occurs between two consecutive pulses of said control signal.

Abstract: An electronic device, includes sigma-delta modulation circuit to operate with a clock signal and having output circuitry to deliver a digital data signal. First circuitry delivers a radiofrequency transposition signal. A notch filter includes radiofrequency digital-to-analog conversion blocks, having first input circuitry coupled to the output circuitry. Second input circuitry receives the radiofrequency transposition signal. Second output circuitry delivers a radiofrequency analog signal. Digital delay circuitry is controlled by the clock signal and includes a delay block between the two first input circuits. The frequency of a notch of the notch filter is related to the value of the delay from the delay block. Summation circuitry sums the radiofrequency signals.

Abstract: A method for processing a digital signal includes an elementary processing including a radiofrequency transposition with a radiofrequency transposition signal and a digital to analog conversion of the transposed digital signal for delivering a radiofrequency analog signal. The digital to analog conversion is controlled by a control signal and a power control signal, the control signal having a frequency twice the frequency of the radiofrequency transposition signal. Each transition of the radiofrequency transposition signal occurs between two consecutive pulses of said control signal.

Abstract: A radio frequency transmission module is adapted to generate a first signal to be transmitted and to convert the signal to a radio frequency carrier for its radio transmission, in an operational phase, and is adapted to generate a second signal and to convert the second signal to the radio frequency carrier, in a calibration phase. The module includes a calibration unit having a subsampler adapted to subsample the second converted signal and a calculation unit adapted to calculate Fourier Transform coefficients representative of the signal delivered by the subsampler, for the purposes of processing the first signal to be transmitted, in the operational phase, as a function of at least some of the Fourier coefficients calculated in the calibration phase.

Abstract: An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.

Abstract: A method for correcting the phase difference between two input signals of a phase-locked loop may include a charge pump connected to a filter. Prior to the occurrence of the first of the two input signals, a calibration phase may be carried out in which the input of the filter is disconnected from the output of the charge pump, the output voltage from the charge pump is equalized, to within a given error, with the input voltage of the filter, the amplitudes of the opposing currents flowing in the charge pump being equalized. Then, during the two respective occurrences of the two input signals, the input of the filter is reconnected to the output of the charge pump, and two phase-shifted signals that are delayed with respect to the input signals are respectively generated, in response to which the two opposing currents are, respectively and successively, interrupted, before the calibration phase is recommenced.

Abstract: An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.

Abstract: A tuner includes an analog block, a digital block, and an analog/digital conversion stage connected therebetween. The analog block includes a first attenuator/controlled-gain amplifier stage connected upstream to a frequency transposition stage. The overall mean power of the entire signal received by the tuner is calculated during a phase of initialization. This overall calculated power is compared in the digital block with a first predetermined reference value corresponding to a maximum power desired at a predetermined location of the analog block. The gain of the first attenuator/amplifier stage is adjusted to minimize the deviation between the overall calculated power and the reference value. In a phase of normal operation, one of the channels of the signal received is selected, with the gain of the first attenuator/amplifier stage being fixed.

Abstract: A method for correcting the phase difference between two input signals of a phase-locked loop may include a charge pump connected to a filter. Prior to the occurrence of the first of the two input signals, a calibration phase may be carried out in which the input of the filter is disconnected from the output of the charge pump, the output voltage from the charge pump is equalized, to within a given error, with the input voltage of the filter, the amplitudes of the opposing currents flowing in the charge pump being equalized. Then, during the two respective occurrences of the two input signals, the input of the filter is reconnected to the output of the charge pump, and two phase-shifted signals that are delayed with respect to the input signals are respectively generated, in response to which the two opposing currents are, respectively and successively, interrupted, before the calibration phase is recommenced.

Abstract: At least a first base signal and a second base signal are mutually in quadrature and both are capable of mutually exhibiting a quadrature error. These signals are used to formulate two pairs of delayed signals that includes a first delayed signal that is delayed with respect to the first base signal, a second signal delayed in phase opposition with respect to the first delayed signal, a third signal delayed with respect to the second base signal, and a fourth delayed signal in phase opposition with respect to the third delayed signal. The value of each of the delays is continuously adjusted using two differential signals arising from a direct or an indirect cross-mixing of the two pairs of delayed signals to obtain the four delayed signals virtually in quadrature.

Abstract: A dual-conversion tuner firstly upconverts so as to place itself outside the receive band and then downconverts with zero intermediate frequency. A filter of the surface acoustic wave type is disposed between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block comprising a channel decoding module. With the exception of the surface acoustic wave filter, the components are entirely embodied in integrated fashion.

Abstract: A &Dgr;&Sgr; modulator including a corrector unit for measuring an error due to differences in the operating parameters of individual components of an internal D/A converter, the corrector unit applying a correction of the error measured in this way to a digital signal, the modulator being characterized in that the internal D/A converter includes a number of individual components greater than the number necessary for internal conversion, and in that the corrector unit is suitable for extracting from the internal conversion process, in alternation, on each occasion a different component from the various individual components in order to measure the operating parameter error of the extracted component, while leaving a number of components in action that is sufficient for internal conversion.

Abstract: An analog-to-digital converter including a first module of the type having a series of processor stages, each of the stages performing two conversions of the signal output by the preceding stage, firstly an analog-to-digital conversion and secondly a digital-to-analog conversion, followed by subtracting the signal obtained from the output signal of the preceding stage to provide the analog output signal of the stage. The first module further assembles together the signals digitized by each stage (S1, . . . , Si) so as to provide an assembled digital signal (SN(nT) which represents the input signal (e(nT) of the converter in digital form.

Abstract: At least a first base signal and a second base signal are mutually in quadrature and both are capable of mutually exhibiting a quadrature error. These signals are used to formulate two pairs of delayed signals that includes a first delayed signal that is delayed with respect to the first base signal, a second signal delayed in phase opposition with respect to the first delayed signal, a third signal delayed with respect to the second base signal, and a fourth delayed signal in phase opposition with respect to the third delayed signal. The value of each of the delays is continuously adjusted using two differential signals arising from a direct or an indirect cross-mixing of the two pairs of delayed signals to obtain the four delayed signals virtually in quadrature.

Abstract: The invention provides an analog-to-digital converter including a first module (100) of the type comprising a series of processor stages, each of said stages performing two conversions of the signal output by the preceding stage, firstly an analog-to-digital conversion and secondly a digital-to-analog conversion, followed by subtracting the signal obtained in this way from the output signal of the preceding stage to provide the analog output signal of said stage, said first module (100) further including means for assembling together the signals digitized by each stage (S1, . . . , Si) so as to provide an assembled digital signal (SN(nT)) which represents the input signal (e(nT)) of the converter in digital form, the converter being characterized in that it further includes a &Dgr;&Sgr; modulator (210) which digitizes the output signal (b(nT)) from one of said stages, and means for subtracting the signal as digitized in this way from said assembled digital signal (SN(nT)).

Abstract: A tuner includes an analog block, a digital block, and an analog/digital conversion stage connected therebetween. The analog block includes a first attenuator/controlled-gain amplifier stage connected upstream to a frequency transposition stage. The overall mean power of the entire signal received by the tuner is calculated during a phase of initialization. This overall calculated power is compared in the digital block with a first predetermined reference value corresponding to a maximum power desired at a predetermined location of the analog block. The gain of the first attenuator/amplifier stage is adjusted to minimize the deviation between the overall calculated power and the reference value. In a phase of normal operation, one of the channels of the signal received is selected, with the gain of the first attenuator/ amplifier stage being fixed.