Abstract: A method for interconnecting a first robot with at least one second robot, each robot including at least: a first program, a second program, a third program, the method including the following steps, implemented by the second program after reception of a first message from the third program: conversion of the first message into a second message, the second message being formatted according to a predefined object structure including a field typ_msg indicating a type of the message amongst the types: command, query, or information; transmission of the second message to at least one program amongst: a first program belonging to the same robot, a second program of another robot.

Abstract: A method for interconnecting a first robot with at least one second robot (2, 21), each robot including at least: a first program, configured to pilot at least one communication equipment; a second program, the configuration of the second program being determined by a setup file including a field typ_service indicating a sending mode amongst the interpret or direct modes, a third program, configured to control at least one actuator and/or at least one sensor; the method comprising the following steps, implemented by the second program after reception of a first message from the third program: conversion of the first message into a second message, the second message being formatted according to a predefined object structure comprising a field typ_msg indicating a type of the message amongst the types: command, query, or information; transmission of the second message to at least one program amongst: a first program belonging to the same robot, a second program of another robot.

Abstract: A method and apparatus for testing by sampling vectors circuit modules designated as channel models or as control modules and containing scan chains. Use is made of a test register which provides at least one control sampling mode signal for control modules and furthermore provides at least one channel sampling mode signal for channel modules. Channel modules and control modules can occur as circuit modules multiply with identical scan chains, enabling efficient testing in a manner that saves memory space. A logic is designed for the read-out of sampling output signals after testing of the scan chains via a read-out terminal unit of a test device, thus providing a comparison with desired sampling output signals for channel modules or for control modules in a comparator unit.

Abstract: A method and apparatus for testing by sampling vectors circuit modules designated as channel models or as control modules and containing scan chains. Use is made of a test register which provides at least one control sampling mode signal for control modules and furthermore provides at least one channel sampling mode signal for channel modules. Channel modules and control modules can occur as circuit modules multiply with identical scan chains, enabling efficient testing in a manner that saves memory space. A logic is designed for the read-out of sampling output signals after testing of the scan chains via a read-out terminal unit of a test device, thus providing a comparison with desired sampling output signals for channel modules or for control modules in a comparator unit.