Abstract: A hybrid structure for a surface acoustic wave device comprises a working layer of piezoelectric material assembled with a support substrate having a lower coefficient of thermal expansion than that of the working layer, and an intermediate layer located between the working layer and the support substrate. The intermediate layer is a sintered composite layer formed from powders of at least a first material and a second material different from the first.

Abstract: A method for manufacturing a semiconductor-on-insulator substrate for radiofrequency applications, comprises: providing a P-doped semiconductor donor substrate; forming a sacrificial layer on the donor substrate; implanting atomic species through the sacrificial layer so as to form in the donor substrate an area of embrittlement defining a thin semiconductor layer that is to be transferred; removing the sacrificial layer from the donor substrate after the implantation; providing a supporting semiconductor substrate having an electrical resistivity greater than or equal to 500 ?·cm; forming an electrically insulating layer on the supporting substrate; bonding the donor substrate on the supporting substrate, the thin semiconductor layer and the electrically insulating layer being at the interface of the bonding; detaching the donor substrate along the area of embrittlement so as to transfer the thin semiconductor layer from the donor substrate onto the supporting substrate.

Abstract: A method for fabricating a semiconductor-on-insulator substrate for radiofrequency applications, comprises: forming a donor substrate through epitaxial growth of an undoped semiconductor layer on a p-doped semiconductor seed substrate; forming an electrically insulating layer on the undoped epitaxial semiconductor, implanting ion species through the electrically insulating layer, so as to form, in the undoped epitaxial semiconductor layer, a weakened area defining a semiconductor thin layer to be transferred, providing a semiconductor carrier substrate having an electrical resistivity greater than or equal to 500 ?·cm, bonding the donor substrate to the carrier substrate via the electrically insulating layer, and detaching the donor substrate along the weakened area of embrittlement so as to transfer the semiconductor thin layer from the donor substrate to the carrier substrate.

Abstract: A substrate for radiofrequency microelectronic devices comprises a carrier substrate made of a semi-conductor, a sintered composite layer disposed on the carrier substrate and formed from powders of at least a first dielectric material and a second dielectric different from the first material, the sintered composite layer having a thickness larger than 5 microns and a thermal expansion coefficient that is matched with that of the carrier substrate to plus or minus 30%.

Abstract: The invention relates to a method for manufacturing a semiconductor-on-insulator structure (10), comprising the following steps: —providing an FD-SOI substrate (1) comprising, successively from its base to its top: a monocrystalline substrate (2) having an electrical resistivity of between 500 ?·cm and 30 k?·cm, an interstitial oxygen content (Oi) of between 20 and 40 old ppma, and having an N- or P-type doping, an electrically insulating layer (3) having a thickness of between 20 nm and 400 nm, a monocrystalline layer (4) having a P-type doping, —heat-treating the FD-SOI substrate (1) at a temperature greater than or equal to 1175° C. for a time greater than or equal to 1 hour in order to form a P-N junction (5) in the substrate. The invention also relates to such a semiconductor-on-insulator structure.

Abstract: A handle substrate for a composite structure comprises a base substrate including an epitaxial layer of silicon on a monocrystalline silicon wafer obtained by Czochralski pulling, a passivation layer on and in contact with the epitaxial layer of silicon, and a charge-trapping layer on and in contact with the passivation layer. The monocrystalline silicon wafer of the base substrate exhibits a resistivity of between 10 and 500 ohm·cm, while the epitaxial layer of silicon exhibits a resistivity of greater than 2000 ohm·cm and a thickness ranging from 2 to 100 microns. The passivation layer is amorphous or polycrystalline. A method is described for forming such a substrate.

Abstract: A semiconductor structure for radio frequency applications includes a support substrate made of silicon and comprising a mesoporous layer, a dielectric layer arranged on the mesoporous layer and a superficial layer arranged on the dielectric layer. The mesoporous layer comprises hollow pores, the internal walls of which are mainly lined with oxide. The mesoporous layer has a thickness between 3 and 40 microns and a resistivity greater than 20 kohm.cm over its entire thickness. The support substrate has a resistivity between 0.5 and 4 ohm.cm. The invention also relates to a method for producing such a semiconductor structure.

Abstract: A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm·cm and a thickness greater than 5 microns positioned on the first insulating layer.

Abstract: A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm·cm and a thickness greater than 5 microns positioned on the first insulating layer.

Abstract: The present disclosure relates to a multilayer semiconductor-on-insulator structure, comprising, successively from a rear face toward a front face of the structure: a semiconductor carrier substrate with high electrical resistivity, whose electrical resistivity is between 500 ?·cm and 30 k?·cm, a first electrically insulating layer, an intermediate layer, a second electrically insulating layer, which has a thickness less than that of the first electrically insulating layer, an active semiconductor layer, the multilayer structure comprises: at least one FD-SOI region, in which the intermediate layer is an intermediate first semiconductor layer, at least one RF-SOI region, adjacent to the FD-SOI region, in which the intermediate layer is a third electrically insulating layer, the RF-SOI region comprising at least one radiofrequency component plumb with the third electrically insulating layer.

Abstract: A semiconductor-on-insulator multilayer structure, comprises: —a stack, called the back stack, of the following layers from a back side to a front side of the structure: a semiconductor carrier substrate the electrical resistivity of which is between 500 ?·cm and 30 k?·cm, a first electrically insulating layer, a first semiconductor layer, —at least one trench isolation that extends through the back stack at least down to the first electrically insulating layer), and that electrically isolates two adjacent regions of the multilayer structure, the multilayer structure being characterized in that it further comprises at least one FD-SOI first region, and at least one RF-SOI second region.

Abstract: A substrate for applications in the fields of radiofrequency electronics and microelectronics, comprises: a base substrate; a single carbon layer positioned on and directly in contact with the base substrate, with the carbon layer having a thickness ranging from 1 nm to 5 nm; an insulator layer positioned on the carbon layer; and a device layer positioned on the insulator layer.

Abstract: A hybrid structure for a surface acoustic wave device comprises a working layer of piezoelectric material assembled with a support substrate having a lower coefficient of thermal expansion than that of the working layer, and an intermediate layer located between the working layer and the support substrate. The intermediate layer is a sintered composite layer formed from powders of at least a first material and a second material different from the first.

Abstract: A substrate for radiofrequency microelectronic devices comprises a carrier substrate made of a semi-conductor, a sintered composite layer disposed on the carrier substrate and formed from powders of at least a first dielectric material and a second dielectric different from the first material, the sintered composite layer having a thickness larger than 5 microns and a thermal expansion coefficient that is matched with that of the carrier substrate to plus or minus 30%.

Abstract: A method for dissolving a buried oxide in a silicon-on-insulator wafer comprises providing a silicon-on-insulator wafer having a silicon layer attached to a carrier substrate via a buried oxide layer, and annealing the silicon-on-insulator wafer to at least partially dissolve the buried oxide layer. The method further comprises a step of providing an oxygen scavenging layer on or over the silicon layer before the annealing step.

Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.

Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.

Abstract: A support for a semiconductor structure includes a base substrate, a first silicon dioxide insulating layer positioned on the base substrate and having a thickness greater than 20 nm, and a charge trapping layer having a resistivity higher than 1000 ohm·cm and a thickness greater than 5 microns positioned on the first insulating layer.

Abstract: A method for dissolving a buried oxide in a silicon-on-insulator wafer comprises providing a silicon-on-insulator wafer having a silicon layer attached to a carrier substrate via a buried oxide layer, and annealing the silicon-on-insulator wafer to at least partially dissolve the buried oxide layer. The method further comprises a step of providing an oxygen scavenging layer on or over the silicon layer before the annealing step.

Abstract: A method for manufacturing a high-resistivity semiconductor-on-insulator substrate comprising the steps of: a) forming a dielectric layer and a semiconductor layer over a high-resistivity substrate, such that the dielectric layer is arranged between the high-resistivity substrate and the semiconductor layer; b) forming a hard mask or resist over the semiconductor layer, wherein the hard mask or resist has at least one opening at a predetermined position; c) forming at least one doped region in the high-resistivity substrate by ion implantation of an impurity element through the at least one opening of the hard mask or resist, the semiconductor layer and the dielectric layer; d) removing the hard mask or resist; and e) forming a radiofrequency (RF) circuit in and/or on the semiconductor layer at least partially overlapping the at least one doped region in the high-resistivity substrate.