Patents by Inventor François LEFLOCH
François LEFLOCH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11941485Abstract: A method for producing a quantum device comprising providing a substrate having a front face and carrying at least one transistor pattern on the front face thereof, said transistor pattern comprising, in a stack a gate dielectric on the front face of the substrate, and a gate on the gate dielectric, said gate having a top and sidewalls. The method further includes forming a protective layer at the front face of the substrate, said protective layer being configured to prevent diffusion of at least one metal species in the substrate, forming a metal layer that has, as a main component, at least one metal species, at least on the sidewalls of the gate, said at least one metal species comprising at least one superconducting element, and forming a superconducting region in the gate by lateral diffusion of the at least one superconducting element from the sidewalls of said gate.Type: GrantFiled: November 24, 2021Date of Patent: March 26, 2024Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Nicolas Posseme, Louis Hutin, Cyrille Le Royer, François Lefloch, Fabrice Nemouchi, Maud Vinet
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Publication number: 20230186136Abstract: A method for producing a quantum device comprising forming a supraconductive layer, forming a mask on the supraconductive layer, the mask comprising masking patterns and at least two openings alternately in a direction, the at least two openings being separated from one another by a separation distance pi (i=1 . . . n), and further each having a width di (i=1 . . . n+1), such as the separation distance pi and a width di are less than a coherence length of a Cooper pair in said supraconductive material, and modifying, through the at least two openings, of the exposed portions of the supraconductive layer, so as to form at least two barriers of width di separating the supraconductive regions.Type: ApplicationFiled: November 21, 2022Publication date: June 15, 2023Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Cyrille LE ROYER, François LEFLOCH, Fabrice NEMOUCHI, Nicolas POSSEME
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Patent number: 11631739Abstract: A method for producing a transistor includes producing on a substrate provided with a semiconductor surface layer in which an active area can be formed, a gate block arranged on the active area. Lateral protection areas are formed against lateral faces of the gate block. Source and drain regions based on a metal material-semiconductor material compound are formed on either side of the gate and in the continuation of a portion located facing the gate block. Insulating spacers are formed on either side of the gate resting on the regions based on a metal material-semiconductor material compound.Type: GrantFiled: November 13, 2019Date of Patent: April 18, 2023Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Fabrice Nemouchi, Antonio Lacerda Santos Neto, Francois Lefloch
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Publication number: 20230060817Abstract: A Josephson transistor, this transistor comprising a source and a drain each comprising an electric charge reservoir in electrical contact with a semiconductor layer. Each reservoir comprises a lower face and a side face both buried inside the semiconductor layer, The lower face of each reservoir extends mainly in an intermediate plane parallel to the plane of a support, this intermediate plane being located between a lower plane and an upper plane that define the semiconductor layer. The side face of each reservoir extends mainly perpendicular to the plane of the support, this side face facing the corresponding side face of the other reservoir and being separated from this corresponding side face of the other reservoir by a channel located under a gate of this transistor.Type: ApplicationFiled: August 30, 2022Publication date: March 2, 2023Applicants: Commissariat à l'Energie Atomique et aux Energies Alternatives, UNIVERSITE GRENOBLE ALPESInventors: Fabrice NEMOUCHI, Frederic GUSTAVO, François LEFLOCH, Tom VETHAAK
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Publication number: 20230061391Abstract: A method for producing a superconducting vanadium silicide on a silicon layer includes treating a face of the silicon layer in order to prepare it for a deposition of vanadium silicide, then depositing a vanadium silicide layer on the prepared face of the silicon layer in order to obtain a stack of a vanadium silicide layer directly deposited on the silicon layer, then an annealing the stack which increases the critical temperature of the vanadium silicide deposited. The treating includes an operation of incorporation of argon atoms in the silicon layer through the face of the silicon layer.Type: ApplicationFiled: August 31, 2022Publication date: March 2, 2023Applicants: Commissariat á l'Energie Atomique et aux Energies Alternatives, UNIVERSITE GRENOBLE ALPESInventors: Fabrice NEMOUCHI, Thierry FARJOT, Frédéric GUSTAVO, François LEFLOCH, Tom Doekle VETHAAK
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Publication number: 20220173229Abstract: A quantum device includes a transistor pattern carried by a substrate, the transistor pattern having, in a stack, a gate dielectric and a superconducting gate on the gate dielectric. The superconducting gate has a base, a tip, sidewalls and at least one superconducting region made of a material that has, as a main component, at least one superconducting element. The superconducting gate also includes a basal portion having a dimension, taken in a first direction of a basal plane that is smaller than a dimension of the tip of the superconducting gate. The transistor pattern further includes at least one dielectric portion made of a dielectric material in contact with the top face of the gate dielectric and the basal portion of the superconducting gate.Type: ApplicationFiled: November 24, 2021Publication date: June 2, 2022Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Nicolas POSSEME, Louis HUTIN, Cyrille LE ROYER, François LEFLOCH, Fabrice NEMOUCHI, Maud VINET
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Publication number: 20220172093Abstract: A method for producing a quantum device comprising providing a substrate having a front face and carrying at least one transistor pattern on the front face thereof, said transistor pattern comprising, in a stack a gate dielectric on the front face of the substrate, and a gate on the gate dielectric, said gate having a top and sidewalls. The method further includes forming a protective layer at the front face of the substrate, said protective layer being configured to prevent diffusion of at least one metal species in the substrate, forming a metal layer that has, as a main component, at least one metal species, at least on the sidewalls of the gate, said at least one metal species comprising at least one superconducting element, and forming a superconducting region in the gate by lateral diffusion of the at least one superconducting element from the sidewalls of said gate.Type: ApplicationFiled: November 24, 2021Publication date: June 2, 2022Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Nicolas POSSEME, Louis HUTIN, Cyrille LE ROYER, François LEFLOCH, Fabrice NEMOUCHI, Maud VINET
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Publication number: 20200161422Abstract: Production of a transistor comprising: producing, on a substrate provided with a semiconductor surface layer (4) wherein an active area (4a) is capable of being formed: a gate block (9) arranged on this active area, forming lateral protection areas (15c) against lateral faces of said gate block (9), forming source and drain regions (19a, 19b) being based on a metal material-semiconductor material compound on either side of the gate and in the continuation of a portion located facing the gate block, then forming insulating spacers (23c) on either side of the gate and resting on said regions based on a metal material-semiconductor material compound (FIG. 1G).Type: ApplicationFiled: November 13, 2019Publication date: May 21, 2020Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Fabrice Nemouchi, Antonio Lacerda Santos Neto, Francois Lefloch