Patents by Inventor François TCHEME WAKAM

François TCHEME WAKAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for programming a one-transistor DRAM memory cell and memory device
    Patent number: 10622058
    Abstract: A method for programming a one-transistor dynamic memory cell of A2RAM type. The A2RAM memory cell includes a source and a drain doped of a first conductivity type, a body region arranged between the source and the drain, and an insulated gate arranged facing the body region. The body region includes first and second portions extending parallel to the insulated gate, the first portion being doped of a second conductivity type opposite to the first conductivity type and arranged between the insulated gate and the second portion, doped of the first conductivity type. The programming method includes biasing the transistor in an off state by electrical potentials applied to the drain and the gate. The drain potential and the gate potential are chosen in such a way as to create charge carriers by impact ionisation in the second portion.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 14, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Joris Lacord, François Tcheme Wakam
  • METHOD FOR PROGRAMMING A ONE-TRANSISTOR DRAM MEMORY CELL AND MEMORY DEVICE
    Publication number: 20190074050
    Abstract: A method for programming a one-transistor dynamic memory cell of A2RAM type. The A2RAM memory cell includes a source and a drain doped of a first conductivity type, a body region arranged between the source and the drain, and an insulated gate arranged facing the body region. The body region includes first and second portions extending parallel to the insulated gate, the first portion being doped of a second conductivity type opposite to the first conductivity type and arranged between the insulated gate and the second portion, doped of the first conductivity type. The programming method includes biasing the transistor in an off state by electrical potentials applied to the drain and the gate. The drain potential and the gate potential are chosen in such a way as to create charge carriers by impact ionisation in the second portion.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 7, 2019
    Inventors: Joris LACORD, François TCHEME WAKAM