Patents by Inventor Francesc Guim Bernat

Francesc Guim Bernat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240248633
    Abstract: Various examples of the present disclosure relate to apparatuses, devices, methods, and computer programs for providing and processing information characterizing a non-uniform memory architecture. An apparatus for a computer system comprises processing circuitry to determine a presence of one or more memory devices connected to at least one processor of the computer system via a serial communication-based processor-to-memory interface, the one or more memory devices being part of a non-uniform memory architecture used by the computer system, determine at least one characteristic for the one or more memory devices by estimating or measuring a performance of the one or more memory devices as observed by the at least one processor, and provide information on the at least one characteristic of the one or more memory devices as part of information characterizing the non-uniform memory architecture.
    Type: Application
    Filed: September 29, 2023
    Publication date: July 25, 2024
    Inventors: Francesc GUIM BERNAT, Karthik KUMAR, Marcos CARRANZA, Rajesh POORNACHANDRAN, Thomas WILLHALM
  • Publication number: 20240249284
    Abstract: Various examples of the present disclosure relate to methods, apparatuses, devices, and computer programs for peers of a blockchain network. A method for distributing tasks to Web3 peers of a blockchain network comprises identifying, during execution of a smart contract, a plurality of tasks to be performed by one or more peers of the blockchain network, determining capabilities of the peers of the blockchain network, wherein at least one capability of at least one peer of the blockchain network is unlocked as an on-demand unlock of the capability at the respective peer, and distributing the plurality of tasks to the one or more peers based on the capabilities of the peers of the blockchain network.
    Type: Application
    Filed: September 29, 2023
    Publication date: July 25, 2024
    Inventors: Rajesh POORNACHANDRAN, Francesc GUIM BERNAT, Marcos CARRANZA, Cesar MARTINEZ-SPESSOT, Mario Jose DIVAN KOLLER
  • Patent number: 12045652
    Abstract: Technologies for batching requests in an edge infrastructure include a compute device including circuitry configured to obtain a request for an operation to be performed at an edge location. The circuitry is also configured to determine, as a function of a parameter of the obtained request, a batch that the obtained request is to be assigned to. The batch includes a one or more requests for operations to be performed at an edge location. The circuitry is also configured to assign the batch to a cloudlet at an edge location. The cloudlet includes a set of resources usable to execute the operations requested in the batch.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: July 23, 2024
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Kshitij Doshi, Suraj Prebhakaran, Ned M. Smith
  • Patent number: 12045466
    Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to receive a current access request for a storage media associated with a stream, identify a hint in the current access request which indicates one or more stream characteristics for future access requests from the stream, and handle the current access request based on the indicated one or more stream characteristics for future access requests from the stream. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: July 23, 2024
    Assignee: Intel Corporation
    Inventor: Francesc Guim Bernat
  • Patent number: 12047357
    Abstract: Embodiments described herein are generally directed to a transparent and adaptable mechanism for performing secure application communications through sidecars. In an example, a set of security features is discovered by a first sidecar of a first microservice of multiple microservices of an application. The set of security features are associated with a device of multiple devices of a set of one or more host systems on which the first microservice is running. Information regarding the set of discovered security features is made available to the other microservices by the first sidecar by sharing the information with a discovery service accessible to all of the microservices. A configuration of a communication channel through which a message is to be transmitted from a second microservice to the first microservice is determined by a second sidecar of the second microservice by issuing a request to the discovery service regarding the first microservice.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: July 23, 2024
    Assignee: Intel Corporation
    Inventors: Cesar Martinez-Spessot, Marcos Carranza, Lakshmi Talluru, Mateo Guzman, Francesc Guim Bernat, Karthik Kumar, Rajesh Poornachandran, Kshitij Arun Doshi
  • Patent number: 12041177
    Abstract: Methods, systems and apparatus disclosed herein create an overlay of nodes to permit the nodes to engage in a peer-to-peer resource bidding process. An example apparatus at an edge of a network includes a first configurer to configure a network interface of a first node of the network in a first configuration, the first configuration to permit the first node to participate in a peer-to-peer resource bidding process with a plurality of other nodes of the network. The apparatus further includes a second configurer to configure the network interface of the first node of the network in a second configuration, the second configuration to prevent the first node from participation in the peer-to-peer resource bidding process.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: July 16, 2024
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Ned Smith, Kshitij Doshi, Rajesh Gadiyar
  • Patent number: 12038861
    Abstract: There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: July 16, 2024
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Da-Ming Chiang, Kshitij A. Doshi, Suraj Prabhakaran, Mark A. Schmisseur
  • Publication number: 20240235959
    Abstract: Various systems and methods for autonomously monitoring intent-driven end-to-end (E2E) orchestration are described herein. An orchestration system is configured to: receive, at the orchestration system, an intent-based service level objective (SLO) for execution of a plurality of tasks; generate a common context that relates the SLO to the execution of the plurality of tasks; select a plurality of monitors to monitor the execution of the plurality of tasks, the plurality of monitors to log a plurality of key performance indicators; generate a domain context for the plurality of tasks; configure an analytics system with the plurality of monitors and the plurality of key performance indicators correlated by the domain contexts; deploy the plurality of monitors to collect telemetry; monitor the execution of the plurality of tasks using the telemetry from the plurality of monitors; and perform a responsive action based on the telemetry.
    Type: Application
    Filed: December 24, 2021
    Publication date: July 11, 2024
    Inventors: John Joseph Browne, Francesc Guim Bernat, Kshitij Arun Doshi, Adrian Hoban, David Cremins, Thijs Metsch, Susanne M. Balle, Christopher MacNamara, Przemyslaw Perycz, Emma Cecilia Collins, Timothy Verrall
  • Publication number: 20240231924
    Abstract: It is provided an apparatus comprising interface circuitry, machine-readable instructions, and processing circuitry to execute the machine-readable instructions. The machine-readable instructions comprise instructions to identify a processing flow pattern of a large language model, LLM, wherein the LLM is executed on a processor circuitry comprising a plurality of processor cores and wherein the processing flow pattern comprising a plurality of processing phases. The machine-readable instructions further comprise instructions to identify a processing phase of the LLM from the processing flow pattern. The machine-readable instructions further comprise instructions to allocate processing resources to the processor circuitry based on the identified processing phase of the LLM.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Inventors: Sharanyan SRIKANTHAN, Karthik KUMAR, Francesc GUIM BERNAT, Rajesh POORNACHANDRAN, Marcos CARRANZA
  • Publication number: 20240236017
    Abstract: A computing node includes a NIC and processing circuitry configured to select a subset of computing resources from a set of available computing resources to initiate a parameter sweep associated with a parameter sweep request received. A plurality of settings is applied to each computing resource of the subset to generate a plurality of resource mappings during the parameter sweep. Each resource mapping of the plurality of resource mappings indicates at least one computing resource of the subset and a corresponding at least one setting of the plurality of settings. Telemetry information for the subset of computing resources is retrieved, the telemetry information is generated during the parameter sweep. A resource mapping of the plurality of resource mappings is selected based on a comparison of the telemetry information with an SLO. A reconfiguration of the available computing resources is performed based on the selected resource mapping.
    Type: Application
    Filed: June 25, 2021
    Publication date: July 11, 2024
    Inventors: Francesc Guim Bernat, Kshitij Arun Doshi, Karol Weber, Marek PIOTROWSKI, Piotr Wysocki
  • Patent number: 12034597
    Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control processing of telemetry data at an edge platform. An example apparatus includes an orchestrator interface to, responsive to an amount of resources allocated to an orchestrator to orchestrate a workload at the edge platform meeting a first threshold, transmit telemetry data associated with the orchestrator to a computer to obtain a first orchestration result at a first granularity; a resource management controller to determine a second orchestration result at a second granularity to orchestrate the workload at the edge platform, the second granularity finer than the first granularity; and a scheduler to schedule a workload assigned to the edge platform based on the second orchestration result.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: July 9, 2024
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Kshitij Doshi, Ned Smith, Thijs Metsch
  • Publication number: 20240223384
    Abstract: Methods and apparatus for attestation and execution of operators. The apparatus is configured to be implemented in a compute platform including at least one processing unit, and is configured to perform client-side attestation operations with an operator attestation service to validate an operator to be executed on the apparatus or a processing unit on the compute platform. The apparatus is also configured to fetch an operator from an operator catalog, compute a hash over the operator, and send a message containing the hash and operator identifier (ID) (or digest containing the same with optional signing) to the operator attestation service, which validates the operator by looking up a valid hash for the operator using the operator ID and comparing the hashes. The apparatus is also configured to maintain and enforce tenant rules relating to execution of operators, and includes a cache for caching validated operators.
    Type: Application
    Filed: September 17, 2021
    Publication date: July 4, 2024
    Inventor: Francesc GUIM BERNAT
  • Patent number: 12026074
    Abstract: Various aspects of methods, systems, and use cases for testing, integration, and deployment of failure conditions in an edge computing environment is provided through use of perturbations.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: July 2, 2024
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Kshitij Arun Doshi, Ned M. Smith
  • Publication number: 20240211310
    Abstract: Technologies for dynamically sharing remote resources include a computing node that sends a resource request for remote resources to a remote computing node in response to a determination that additional resources are required by the computing node. The computing node configures a mapping of a local address space of the computing node to the remote resources of the remote computing node in response to sending the resource request. In response to generating an access to the local address, the computing node identifies the remote computing node based on the local address with the mapping of the local address space to the remote resources of the remote computing node and performs a resource access operation with the remote computing node over a network fabric. The remote computing node may be identified with system address decoders of a caching agent and a host fabric interface. Other embodiments are described and claimed.
    Type: Application
    Filed: March 7, 2024
    Publication date: June 27, 2024
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Kshitij A. Doshi, Daniel Rivas Barragan, Alejandro Duran Gonzalez, Harald Servat
  • Patent number: 12020078
    Abstract: Technologies for providing a multi-tenant local breakout switching and dynamic load balancing include a network device to receive network traffic that includes a packet associated with a tenant. Upon a determination that the packet is encrypted, a secret key associated with the tenant is retrieved. The network device decrypts a payload from the packet using the secret key. The payload is indicative of one or more characteristics associated with network traffic. The network device evaluates the characteristics and determines whether the network traffic is associated with a workload requesting compute from a service hosted by a network platform. If so, the network device forwards the network traffic to the service.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: June 25, 2024
    Assignee: INTEL CORPORATION
    Inventors: Francesc Guim Bernat, Ned Smith, Kshitij Doshi, Raghu Kondapalli, Alexander Bachmutsky
  • Patent number: 12019768
    Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to process memory operation requests from a memory controller, and provide a front end interface to remote pooled memory hosted at a near edge device. An embodiment of another electronic apparatus may include local memory and logic communicatively coupled the local memory, the logic to allocate a range of the local memory as remote pooled memory, and provide a back end interface to the remote pooled memory for memory requests from a far edge device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: June 25, 2024
    Assignee: Intel Corporation
    Inventors: Francesc Guim Bernat, Karthik Kumar, Mark Schmisseur, Thomas Willhalm
  • Publication number: 20240193617
    Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed. An example apparatus includes programmable circuitry to at least: obtain a first response associated with an estimate of emissions to be produced by execution of a workload on first hardware; obtain a second response associated with an estimate of emissions to be produced by execution of the workload on second hardware; and assign one of the first or the second hardware to execute the workload based on the first response and the second response, the assigned one of the first or the second hardware to at least one of utilize more time or more memory to execute the workload than the other of the first or the second hardware.
    Type: Application
    Filed: December 15, 2023
    Publication date: June 13, 2024
    Inventors: Francesc Guim Bernat, Karthik Kumar, Akhilesh S. Thyagaturu, Thijs Metsch, Adrian Hoban
  • Publication number: 20240193284
    Abstract: Techniques and mechanisms to allocate functionality of a chiplet for access by one or more processor cores which are coupled to remote processor via a network switch. In an embodiment, a composite chip communicates with the switch via a Compute Express Link (CXL) link. The switch receives capability information which identifies both a chiplet of the composite chip, and a functionality which is available from a resource of that chiplet. Based on the capability information, the switch provides an inventory of chiplet resources. In response to an allocation request, the switch accesses the inventory to identify whether a suitable chiplet resource is available. Based on the access, the switch configures a chip to enable an allocation of a chiplet resource. In another embodiment, the chiplet resource is allocated at a sub-processor level of granularity, and disables access to the chiplet resource by one or more local processor cores.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Applicant: Intel Corporation
    Inventors: Francesc Guim Bernat, Marcos Carranza, Kshitij Doshi, Ned Smith, Karthik Kumar
  • Publication number: 20240195605
    Abstract: Technologies for dynamic accelerator selection include a compute sled. The compute sled includes a network interface controller to communicate with a remote accelerator of an accelerator sled over a network, where the network interface controller includes a local accelerator and a compute engine. The compute engine is to obtain network telemetry data indicative of a level of bandwidth saturation of the network. The compute engine is also to determine whether to accelerate a function managed by the compute sled. The compute engine is further to determine, in response to a determination to accelerate the function, whether to offload the function to the remote accelerator of the accelerator sled based on the telemetry data. Also the compute engine is to assign, in response a determination not to offload the function to the remote accelerator, the function to the local accelerator of the network interface controller.
    Type: Application
    Filed: December 15, 2023
    Publication date: June 13, 2024
    Inventor: Francesc Guim Bernat
  • Publication number: 20240185714
    Abstract: The disclosure relates to systems, methods, and devices for managing traffic through a road segment and/or intersection. The traffic management system may place traffic objects in a collaboration group for coordinating movements in the road segment and/or intersection in response to a received indication that an emergency vehicle has a planned route that includes the road segment and/or intersection. The traffic management system may determine a movement plan for each traffic object in the collaboration group based on received measurements about the road segment and the planned route of the emergency vehicle. The traffic management system may control a transmitter to send the movement plan to each traffic object in the collaboration group.
    Type: Application
    Filed: September 24, 2021
    Publication date: June 6, 2024
    Inventors: Satish JHA, Kathiravetpillai SIVANESAN, S M Iftekharul ALAM, Kuilin Clark CHEN, Kshitij DOSHI, Leonardo GOMES BALTAR, Francesc GUIM BERNAT, Arvind MERWADAY, Markus Dominik MUECK, Suman A. SEHRA, Vesh Raj SHARMA BANJADE, Soo Jin TAN