Abstract: A circuit for initializing the output voltage of an analog circuit includes a switch operative to connect an input of the analog circuit to a first reference potential during an initializing period. A comparator is connected to compare the output voltage of the analog circuit with a second reference potential to produce an output representing the comparison. A resistor ladder having a plurality of voltage step output lines along its length is connected to inputs of a multiplexer, the multiplexer having an output connected to bias the analog circuit. A counter having a clock input and a count output is connected with the count output connected to operate the multiplexer to sequentially select among the steps of the resistor ladder. A circuit clocks the counter until the output of the comparator reaches a predetermined value, wherein a voltage step output line of the resistor ladder is selected to control the output of the multiplexer.

Abstract: A circuit for providing drive current to a coil of a motor uses a sensefet current sensing device having a sense node and a source node. The source node is connected to deliver current to the coil, wherein a "sense" current proportional to said delivered current is produced on the sense node. An amplifier is connected to sense a voltage between said sense and source nodes to produce an output voltage to force a voltage on the sense node to be the same as a voltage on the source node. A pass element is connected to route said "sense" current to an output node. The circuit produces an output that is suitable for use as a feedback signal in a motor control system.

Abstract: A method for aligning a rotor of a brushless and sensorless DC motor, the motor having a stator with at least two coils, sets of the coils being selectively energizable by a power source connected to the motor, includes steps of energizing a first set of at least one coil of the at least two coils; generating a signal indicating whether the rotor has been rotated at a rotary speed greater than a predetermined rotary speed while the first set was energized; and when the signal indicates that the rotor has not been rotated at a rotary speed greater than the predetermined rotary speed, switching the connection between the power source and the motor and energizing a second set of at least one coil of the at least two coils.

Abstract: A circuit for controlling a current in a load that includes an inductive component provides a high constant gain at low frequencies, a gain roll off at medium frequencies, and a low gain above unity gain at frequencies between the medium frequencies to high frequencies so that the gain roll off of the circuit to below unity gain is provided by a pole of the inductive load component. As a result, the circuit has a bandwidth limited only by the poles of the load. The circuit has a high gain amplifier with an input connected to receive a input control signal, and a low gain amplifier with an output connected to a control element of a switching element in a current path of the load. A frequency compensation circuit is connected between an output of the high gain amplifier and an input of the low gain amplifier, and includes a high frequency current bypass path and a resistor in series therewith operative to reduce the signal input to the low gain amplifier at high frequencies.

Abstract: A circuit and method for generating drive signals having a frequency synchronized to a reference frequency signal is disclosed. The circuit includes a PLL that includes a motor, and a circuit for generating a signal having a frequency proportional to the speed of the motor. A phase detector produces a signal for a time proportional to a phase difference between the motor speed signal and a reference frequency signal. A first phase difference measuring circuit produces a first voltage output signal at a first gain proportional to the phase difference when the duration of the phase detector signal is less than a predetermined time. A second phase difference measuring circuit produces a second output signal at a second gain when the duration of the phase detector signal is greater than the predetermined time. The first and second output signals are summed and applied to control the speed of the motor.

Abstract: A circuit for operating a polyphase dc motor, for example of the type having a plurality of "Y" connected stator coils, has circuitry for unambiguously determining the actual instantaneous position of the rotor of the motor, circuitry for determining a desired rotor position precedent to executing a desired commutation sequence, and circuitry for executing the desired commutation sequence when the circuit for determining the actual instantaneous position of the rotor detects that the rotor is actually in the desired rotor position. The circuitry for unambiguously determining the actual instantaneous position of the rotor includes a back emf amplifier switchably connected to at least one floating coil, and circuitry for determining when the voltage received by the back emf amplifier crosses a reference voltage from a predetermined direction.

Abstract: A circuit and method for converting a digital number to an analog output signal, wherein the most significant bit or "sign" bit of the digital number is used for switching the accumulated currents of the other data bits to a chain of operational amplifiers employing feedback resistors for conversion into an output voltage of magnitude and sign corresponding to the input digital number. A decoding circuit and method enables the circuit to present an output voltage corresponding to the two's--complement of the input digital number.

Abstract: A driver circuit for providing drive current to a coil for positioning a read/write head of a memory disk system and method are presented. The driver circuit includes a pair of high side driver transistors having current paths connected between respective terminals of the coil and a voltage source, a first pair of low side driver transistors having current paths connected between respective terminals of the coil and a first voltage sense node, and a second pair of low side driver transistors having current paths connected between respective terminals of the coil and a second voltage sense node. A first sense resistor is connected between the first and second voltage sense nodes, and a second sense resistor is connected between the second sense node and a reference potential.

Abstract: A circuit automatically changes the gain in a PLL for driving a motor of the type having a motor speed signal that indicates the speed of motor rotation. The circuit includes a phase detector for sensing a phase difference between the motor speed signal and a reference frequency and for producing an output signal of duration proportional to the sensed phase difference. A counter counts clock pulses throughout the duration of the output signal, and a motor driving circuit drives the motor in response to the count reached by the counter. A source of clock pulses provides clock signals at first and second frequencies, the second frequency being lower than the first frequency, and a lock range sense circuit produces a sense signal output that indicates when the PLL is within a predetermined phase difference range.

Abstract: A circuit and method are provided for automatically adjusting a commutation delay from events indicating a position of a polyphase dc motor. The circuit includes a driver to supply drive current to selected stator coils of said motor. A sequencer is connected to control the driver to apply drive current to selected motor coils to rotate the motor. Motor position detecting circuitry is connected to detect the events indicating the position of the motor. A commutation delay circuit is connected to increment the sequencer in response to the detection of the events indicating the position of the motor detected by the motor position detecting circuitry. A circuit for adjusting the delay of said commutation delay circuit between each event and each sequencer commutation provides optimum motor commutation for maximum power efficiency.According to the method, drive current is supplied to selected stator coils of said motor in predetermined commutated sequences to rotate the motor.

Abstract: A circuit and method for buffering a high output impedance voltage generator circuit to a low input impedance load circuit is described. Two emitter-follower stages are used with a load current feedback configuration so that the base to emitter voltages of all four transistors maintain a fixed relationship and therefore the output voltage presented to the load maintains a fixed relationship to the input voltage presented to the buffer amplifier circuit.

Abstract: Synchronization of the output of an internally-driven VCO to an exterior clock signal is obtained by using the exterior clock signal to re-start the VCO at every exterior clock pulse, until the pre-set VCO frequency is reached. At that point, the restarting of the VCO ceases, and the VCO locks onto the internal signal it is designed to track. One application of this circuit is for enabling a smooth transition between open-loop, ramp-up of a polyphase DC motor to closed loop operation. Implementation of the circuit described phase-synchronizes the output of a phase-switching PLL loop, which is tracking the back emf of the motor, to the external clock used for motor ramp-up, so that there is no "jolt" in the motor at the transition from open-loop to closed-loop operation of the motor.

Abstract: A circuit for providing a signal proportional to the average current supplied to the coils of a motor operated in both linear and PWM modes includes a sense resistor across which a voltage representing the current flowing supplied to said coils is developed. The voltage is selectively applied to an output circuit which operates as a low pass filter circuit when drive current is supplied to the coils and as a voltage hold circuit when drive current is not supplied to the coils. The output circuit includes an amplifier connected to receive a voltage produced by the sense resistor when the motor is operated in the linear mode, and a capacitor and a resistor connected in parallel, the capacitor and resistor being connected between an input and an output of the amplifier to operate as a low pass filter circuit.

Abstract: A driver circuit provides a high output current at a fast slew rate to a low impedance load. The driver circuit has an output circuit including a first bipolar transistor having a collector emitter path between a voltage supply line and a node for connection to a load. The output circuit also includes a first FET having its source-drain path connected between the voltage supply line and the base of the bipolar transistor, and its gate connected to an input node. An additional circuit supplies drive current to the base of the first bipolar transistor only to assist the first bipolar transistor turn-on, so that the additional circuit does not add extra voltage drop across the first bipolar transistor during turned on operation. In one embodiment, the first and second bipolar transistors are NPN transistors, and the first and second FETs are p-channel FET devices.

Abstract: Voltage slew-rate control for inductive load connected to the drain of an insulated gate enhancement mode field effect transistor is disclosed. The voltage slew-rate control is accomplished by incorporating a current integrator between the gate and drain of the field effect transistor, thereby effectively annihilating the capacitance of the field effect transistor which has heretofore proven to be generally responsible for instability and oscillations when slew-rate control is attempted in such a circuit. The current integrator includes a capacitor and a current source in circuit with a high speed unity gain buffer amplifier. The buffer amplifier preferably has a low impedance through the frequencies of interest to prevent the natural resonances of stray capacitances with the inductive load.

Abstract: A circuit for presenting a multiplied impedance at in input node includes a resistor having a value desired to be multiplied at the input node connected at one end to a reference potential. A first transistor has a current path in series between the input node and the other end of the resistor. A voltage divider is connected at one end to the reference potential, and a second transistor has a current path in series between a voltage source and the other end of the voltage divider, so that the second transistor and the voltage divider form an emitter follower circuit, to provide feedback to said first transistor circuit. A current control element of the first transistor is connected to receive the divided voltage from the voltage divider, and a current control element of the second transistor being connected to the input node. The transistors can be either bipolar, enhancement FET or MOS enhancement FET type devices.

Abstract: A starting and operating apparatus and method for a sensorless, brushless direct current motor is disclosed. During start-up, the excitation to the motor is turned off while the slope of the differential back electromotive force of the floating phases is sampled. This indicates when the proper rotation and torque of the motor is obtained. After starting the motor, the apparatus samples the slope of the back electromotive force of the floating coils and finds a zero or predetermined slope condition which has been found to be near the optimum switching point for commutation from one phase to the next. A masking circuit is included to prevent an unwanted commutation immediately after commutating to the next phase.