Patents by Inventor Francesco La Via
Francesco La Via has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11946158Abstract: An apparatus for growing semiconductor wafers, in particular of silicon carbide, wherein a chamber houses a collection container and a support or susceptor arranged over the container. The support is formed by a frame surrounding an opening accommodating a plurality of arms and a seat. The frame has a first a second surface, opposite to each other, with the first surface of the frame facing the support. The arms are formed by cantilever bars extending from the frame into the opening, having a maximum height smaller than the frame, and having at the top a resting edge. The resting edges of the arms define a resting surface that is at a lower level than the second surface of the frame. The seat has a bottom formed by the resting surface.Type: GrantFiled: May 22, 2023Date of Patent: April 2, 2024Assignee: STMICROELECTRONICS S.r.l.Inventors: Ruggero Anzalone, Nicolo' Frazzetto, Francesco La Via
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Publication number: 20230295836Abstract: An apparatus for growing semiconductor wafers, in particular of silicon carbide, wherein a chamber houses a collection container and a support or susceptor arranged over the container. The support is formed by a frame surrounding an opening accommodating a plurality of arms and a seat. The frame has a first a second surface, opposite to each other, with the first surface of the frame facing the support. The arms are formed by cantilever bars extending from the frame into the opening, having a maximum height smaller than the frame, and having at the top a resting edge. The resting edges of the arms define a resting surface that is at a lower level than the second surface of the frame. The seat has a bottom formed by the resting surface.Type: ApplicationFiled: May 22, 2023Publication date: September 21, 2023Applicant: STMICROELECTRONICS S.r.l.Inventors: Ruggero ANZALONE, Nicolo' FRAZZETTO, Francesco La Via
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Patent number: 11719832Abstract: The present invention relates to a silicon carbide telescopic detector for ionizing radiation or a measuring instrument equipped with such a telescopic detector for identifying the type of ionizing radiation and/or measuring a dose released by the radiation, a detector production procedure, as well as uses and original methods which use the detector.Type: GrantFiled: June 28, 2019Date of Patent: August 8, 2023Inventors: Salvatore Tudisco, Francesco La Via, Giada Petringa, Giuseppe Antonio Pablo Cirrone, Sebastiana Maria Regina Puglia
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Patent number: 11692283Abstract: An apparatus for growing semiconductor wafers, in particular of silicon carbide, wherein a chamber houses a collection container and a support or susceptor arranged over the container. The support is formed by a frame surrounding an opening accommodating a plurality of arms and a seat. The frame has a first a second surface, opposite to each other, with the first surface of the frame facing the support. The arms are formed by cantilever bars extending from the frame into the opening, having a maximum height smaller than the frame, and having at the top a resting edge. The resting edges of the arms define a resting surface that is at a lower level than the second surface of the frame. The seat has a bottom formed by the resting surface.Type: GrantFiled: September 1, 2020Date of Patent: July 4, 2023Assignee: STMICROELECTRONICS S.r.l.Inventors: Ruggero Anzalone, Nicolo′ Frazzetto, Francesco La Via
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Publication number: 20220172949Abstract: A production process of a SiC wafer carried out in a same reaction chamber includes forming, on a support, a first SiC layer. The support is separated from the first SiC layer. A second SiC layer is grown on the first SiC layer, which includes introducing into the reaction chamber a precursor in the gaseous phase of a first dopant having a first electrical conductivity to generate a first stress in the second SiC layer, and introducing into the reaction chamber a precursor in the gaseous phase of a second dopant having a second electrical conductivity opposite to the first electrical conductivity, to generate a second stress in the second SiC layer that is opposite to, and balances, the first stress. The SiC wafer is thus without effects of warpage.Type: ApplicationFiled: November 23, 2021Publication date: June 2, 2022Applicant: STMicroelectronics S.r.l.Inventors: Ruggero ANZALONE, Francesco LA VIA
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Publication number: 20220128712Abstract: The present invention relates to a silicon carbide telescopic detector for ionizing radiation or a measuring instrument equipped with such a telescopic detector for identifying the type of ionizing radiation and/or measuring a dose released by the radiation, a detector production procedure, as well as uses and original methods which use the detector.Type: ApplicationFiled: June 28, 2019Publication date: April 28, 2022Inventors: Salvatore Tudisco, Francesco La Via, Giada Petringa, Giuseppe Antonio Pablo Cirrone, Sebastiana Maria Regina Puglia
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Publication number: 20210062361Abstract: An apparatus for growing semiconductor wafers, in particular of silicon carbide, wherein a chamber houses a collection container and a support or susceptor arranged over the container. The support is formed by a frame surrounding an opening accommodating a plurality of arms and a seat. The frame has a first a second surface, opposite to each other, with the first surface of the frame facing the support. The arms are formed by cantilever bars extending from the frame into the opening, having a maximum height smaller than the frame, and having at the top a resting edge. The resting edges of the arms define a resting surface that is at a lower level than the second surface of the frame. The seat has a bottom formed by the resting surface.Type: ApplicationFiled: September 1, 2020Publication date: March 4, 2021Inventors: Ruggero ANZALONE, Nicolo' FRAZZETTO, Francesco LA VIA
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Publication number: 20150031193Abstract: A semiconductive substrate (1) is described that is suitable for realising electronic and/or optoelectronic devices of the type comprising at least one substrate (3), in particular of single crystal silicon, and an overlying layer of single crystal silicon (5). Advantageously, according to the invention, the semiconductive substrate (1) comprises at least one functional coupling layer (10) suitable for reducing the defects linked to the differences in the materials used. In particular, the functional coupling layer 10 comprises a corrugated portion (6) made in the layer of single crystal silicon (5) and suitable for reducing the defects linked to the differences in lattice constant of such materials used.Type: ApplicationFiled: October 14, 2014Publication date: January 29, 2015Applicant: Consiglio Nazionale Delle RicercheInventors: Guiseppe Alessio Maria D'Arrigo, Francesco LA VIA
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Patent number: 8890103Abstract: A semiconductive substrate that is suitable for realising electronic and/or optoelectronic devices that include at least one substrate, in particular of single crystal silicon, and an overlying layer of single crystal silicon. Advantageously, the semiconductive substrate comprises at least one functional coupling layer suitable for reducing the defects linked to the differences in the materials used. The functional coupling layer can comprise a corrugated portion made in the layer of single crystal silicon and suitable for reducing the defects linked to the differences in lattice constant of such materials used. Alternatively, the functional coupling layer can comprise a porous layer arranged between the substrate of single crystal silicon and the layer of single crystal silicon, and suitable for reducing the stress caused by the differences between the thermal expansion coefficients of the materials used. A manufacturing process of such a semiconductive substrate is also described.Type: GrantFiled: November 18, 2011Date of Patent: November 18, 2014Assignee: Consiglio Nazionale Delle RicercheInventors: Giuseppe Alessio Maria D'Arrigo, Francesco La Via
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Publication number: 20140264385Abstract: A method is provided for fabricating a wafer of semiconductor material intended for use for the integration of electronic and/or optical and/or optoelectronic devices. The method comprises: providing a starting wafer of crystalline silicon (205); on the starting wafer of crystalline silicon, epitaxially growing a buffer layer (210) consisting of a sub-stoichiometric alloy of silicon and germanium; epitaxially growing on the buffer layer a layer (225) of a semiconductor material having an energy gap greater than that of the crystalline silicon constituting the starting wafer, wherein the layer of semiconductor material having an energy gap greater than that of the crystalline silicon is grown so to have a thickness capable of constituting a substrate for the integration therein of electronic and/or optical and/or optoelectronic devices.Type: ApplicationFiled: July 25, 2012Publication date: September 18, 2014Applicant: Consiglio Nazionale delle RicercheInventors: Camarda Massimo, Andrea Severino, Francesco La Via
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Publication number: 20120133027Abstract: A semiconductive substrate that is suitable for realising electronic and/or optoelectronic devices that include at least one substrate, in particular of single crystal silicon, and an overlying layer of single crystal silicon. Advantageously, the semiconductive substrate comprises at least one functional coupling layer suitable for reducing the defects linked to the differences in the materials used. The functional coupling layer can comprise a corrugated portion made in the layer of single crystal silicon and suitable for reducing the defects linked to the differences in lattice constant of such materials used. Alternatively, the functional coupling layer can comprise a porous layer arranged between the substrate of single crystal silicon and the layer of single crystal silicon, and suitable for reducing the stress caused by the differences between the thermal expansion coefficients of the materials used. A manufacturing process of such a semiconductive substrate is also described.Type: ApplicationFiled: November 18, 2011Publication date: May 31, 2012Applicant: Consiglio Nazionale Delle RicercheInventors: Giuseppe Alessio Maria D'Arrigo, Francesco La Via
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Publication number: 20100013057Abstract: A semiconductive substrate (1) is described that is suitable for realising electronic and/or optoelectronic devices of the type comprising at least one substrate (3), in particular of single crystal silicon, and an overlying layer of single crystal silicon (5). Advantageously, according to the invention, the semiconductive substrate (1) comprises at least one functional coupling layer (10) suitable for reducing the defects linked to the differences in the materials used. In particular, the functional coupling layer 10 comprises a corrugated portion (6) made in the layer of single crystal silicon (5) and suitable for reducing the defects linked to the differences in lattice constant of such materials used.Type: ApplicationFiled: July 16, 2009Publication date: January 21, 2010Applicant: Consiglio Nazionale Delle RicercheInventors: Giuseppe Alessio Maria D'Arrigo, Francesco La Via
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Publication number: 20060183267Abstract: A process realizes a Schottky contact on an epitaxial layer of a semiconductor substrate. The process includes depositing a conductive metallic layer on a surface of the epitaxial layer, with achievement of a interface region of conductive metallic layer/semiconductor. The process further comprises a ionic irradiation step directed towards the surface of the epitaxial layer for forming a modified intermediate layer of at least one surface portion of the epitaxial layer for making the electric behavior of the interface region substantially dependant on the contact between the conductive metallic layer and the obtained modified intermediate layer.Type: ApplicationFiled: September 27, 2005Publication date: August 17, 2006Applicant: STMicroelectronics S.r.l.Inventors: Fabrizio Roccaforte, Vito Raineri, Francesco La Via, Mario Saggio