Abstract: A frequency linearity measurement circuit configured to measure a frequency linearity of a frequency signal includes: a first measurement circuit having a counter, where the counter is controlled by a gate signal having a gate signal period, where the first measurement circuit is configured to generate a first estimate of an integer number of clock cycles of the frequency signal within a respective gate signal period of the gate signal; a second measurement circuit having a time-to-digital converter (TDC), where the TDC is controlled by the gate signal, and is configured to generate a second estimate of a fractional number of clock cycle of the frequency signal within the respective gate signal period of the gate signal; and a reference measurement circuit configured to generate a third estimate of an expected number of clock cycles within the respective gate signal period of the gate signal.

Abstract: A frequency linearity measurement circuit configured to measure a frequency linearity of a frequency signal includes: a first measurement circuit configured to generate a first estimate of an integer number of clock cycles of the frequency signal within a respective gate signal period of a gate signal; a second measurement circuit comprising a time-to-digital converter (TDC) configured to generate a second estimate of a fractional number of clock cycle of the frequency signal within the respective gate signal period; a reference measurement circuit configured to generate a third estimate of an expected number of clock cycles within the respective gate signal period; and a closed-loop frequency tracking circuit configured to track a frequency error between an expected frequency and a measured frequency, where the expected frequency and the measured frequency are determined based on the third estimate and on a sum of the first estimate and the second estimate, respectively.

Abstract: A radio frequency (RF) circuit includes an input terminal configured to receive a reception signal from an antenna; an output terminal configured to output a digital output signal; a receive path including a mixer and an analog-to-digital converter (ADC), wherein the receive path is coupled to and between the input and output terminals, wherein the receive path includes an analog portion and a digital portion, and wherein the ADC generates a digital signal based on an analog signal received from the analog portion; a test signal generator configured to generate an analog test signal injected into the analog portion of the receive path; and a digital processor configured to receive a digital test signal from the digital portion, the digital test signal being derived from the analog test signal, analyze a frequency spectrum of the digital test signal, and determine a quality of the digital test signal.

Abstract: A dynamic element matching (DEM) encoder is provided that converts an N-bit digital codeword into a pattern of 1-bit values. The DEM encoder includes a binary switching tree that includes plurality of switching blocks interconnected between an encoder input and a plurality of encoder outputs. The plurality of switching blocks are configured to receive a plurality of first control signals such that each switching block receives a respective first control signal and is independently programmable based on the respective first control signal into a first mode or a second mode. Each switching block includes a splitting circuit programmed into the first mode or the second mode to split a digital input into two digital outputs using either both a first splitting operation and a second splitting operation that is different from the first splitting operation or the first splitting operation over the plurality of sampling intervals.

Abstract: A radar system is provided that includes a radar monolithic microwave integrated circuit (MMIC). The radar MMIC includes a plurality of radar signal channels; and at least one sensor configured to measure a physical parameter related to a temperature of the radar MMIC, and to generate sensor data corresponding to measured values of the physical parameter; and a controller configured to receive the sensor data from the at least one sensor, and to determine a channel operation of the plurality of radar signal channels, including selectively disabling at least a first radar signal channel of the plurality of radar signal channels and selectively enabling at least a second radar signal channel of the plurality of radar signal channels based on the measured values.

Abstract: A cascaded RF system includes a first MMIC and at least a second MMIC. During a first mode of operation: using an LO generation circuit of the first MMIC to generate a first LO signal based on a system clock signal; outputting the first LO signal from an LO output port of the first MMIC; receiving the first LO signal via a first LO input port of the first MMIC; and receiving the first LO signal via a second LO input port of the second MMIC. During a second mode of operation: using an LO generation circuit of the second MMIC to generate a second LO signal based on the system clock signal; and outputting the second LO signal from an LO output port of the second MMIC to a first LO input port of the second MMIC and to a second LO input port of the first MMIC.

Abstract: In some implementations, a radar device comprises: a clock input configured to receive a clock signal, a local oscillator configured to generate a first RF local oscillator signal based on the clock signal, and also an RF input configured to receive a second RF local oscillator signal. The radar device further comprises a phase shifter configured to shift the phase of the first RF local oscillator signal or of the second RF local oscillator signal by a settable phase value. A monitor circuit is configured to combine the first RF local oscillator signal and the second RF local oscillator signal and to generate a sequence of signal values based on the combined signal. A computing unit is configured to determine the relative phase of the second RF local oscillator signal in relation to the first RF local oscillator signal based on the sequence of signal values.

Abstract: A radio frequency (RF) circuit includes an input terminal configured to receive a reception signal from an antenna; an output terminal configured to output a digital output signal; a receive path including a mixer and an analog-to-digital converter (ADC), wherein the receive path is coupled to and between the input and output terminals, wherein the receive path includes an analog portion and a digital portion, and wherein the ADC generates a digital signal based on an analog signal received from the analog portion; a test signal generator configured to generate an analog test signal injected into the analog portion of the receive path; and a digital processor configured to receive a digital test signal from the digital portion, the digital test signal being derived from the analog test signal, analyze a frequency spectrum of the digital test signal, and determine a quality of the digital test signal.

Abstract: A radar system is provided that includes a radar monolithic microwave integrated circuit (MIMIC). The radar MMIC includes a plurality of radar signal channels; and at least one sensor configured to measure a physical parameter related to a temperature of the radar MIMIC, and to generate sensor data corresponding to measured values of the physical parameter; and a controller configured to receive the sensor data from the at least one sensor, and to determine a channel operation of the plurality of radar signal channels, including selectively disabling at least a first radar signal channel of the plurality of radar signal channels and selectively enabling at least a second radar signal channel of the plurality of radar signal channels based on the measured values.