Patents by Inventor Francis A. Scherpenberg
Francis A. Scherpenberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6145035Abstract: A system comprising a card device for effectuating a transaction when presented to a transaction terminal, the card device including a memory and a first energy source, the source for powering the memory for a period of time, and a card cradle carrier for storing the card device when the card device is not engaged in the transaction. The card cradle carrier is formed of a substantially rigid material and forms at least a portion of a personal effect. In accordance with the teachings of the present invention, the card cradle carrier includes a second energy source for recharging the first energy source when the card device is received for storage by the card cradle carrier.Type: GrantFiled: February 25, 1999Date of Patent: November 7, 2000Assignee: Dallas Semiconductor CorporationInventors: Chao C. Mai, Francis A. Scherpenberg, Titkuan Hui, Wayne Mendenhall
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Patent number: 6108751Abstract: A system architecture which provides efficient data communication, over a one-wire bus, with a portable data module which does not necessarily include any accurate time base whatsoever. The time base in the module can be extremely crude (e.g. more than 4:1 uncertainty). An open-collector architecture is used, with electrical relations defined to absolutely minimize the drain on the portable module's battery. The protocol has been specified so that the module never sources current to the data line, but only sinks current. The protocol includes signals for read; write-zero; write-one; and reset. Each one-bit transaction is initiated by a falling edge from the host. The time base in the module defines a delay, after which (in write mode) the module tests the data state of the data line. In read mode, after a falling edge the module does or does not turn on its pull-down transistor, depending on the data value.Type: GrantFiled: July 22, 1999Date of Patent: August 22, 2000Assignee: Dallas Semiconductor CorporationInventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5974504Abstract: A secured metal token using a single wire communication system is employed to dispense units of value and to provide a secure storage device for controlling the dispensing of articles or service items. The metal token can be formed of two pieces with a simplified electronic circuit inside which can contain units of value for the dispensing of items using the memory within the metal token as a secure vault. The token uses a simple two wire (ground and combined clock/data) arrangment. As goods are purchased or services rendered the value of those good or services is deducted from a prestored amount within the token.Type: GrantFiled: July 15, 1998Date of Patent: October 26, 1999Assignee: Dallas Semiconductor CorporationInventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Peirling
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Patent number: 5914543Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.Type: GrantFiled: June 7, 1995Date of Patent: June 22, 1999Assignee: Dallas Semiconductor CorporationInventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
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Patent number: 5864872Abstract: A communication circuit is provided in which reads from a device are controlled by sensing a transition by a host communicating with a device. The device then accepts a one which holds the line high for a predetermined time period or accepts a zero when the line is held high for a different time period. The sending of data is accomplished in a symmetrical relationship by having the device after the host pulls the line high by either by allowing the line to remain high or forcing the line to ground within the requisite time periods. This allows the "slave" device to consume almost no power in either the read or the write modes.Type: GrantFiled: May 28, 1996Date of Patent: January 26, 1999Assignee: Dallas Semiconductor CorporationInventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5717935Abstract: A digital rheostat or potentiometer which provides both increment and decrement operations from a single input such as a pushbutton. A certain pattern of input actuations will cause the direction of change to reverse. Settings of the potentiometer are stored in nonvolatile memory.Type: GrantFiled: February 10, 1995Date of Patent: February 10, 1998Assignee: Dallas Semiconductor CorporationInventors: Gary V. Zanders, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5647121Abstract: A socket system that comprises a printed circuit board; an electrical module; and a socket having a hollow core. The socket holds the electrical module and is capable of electrically coupling the electrical module to the printed circuit board. The electrical module has at least one electrical lead. The socket has at least one electrical lead capable of electrically coupling with the electrical lead(s) of the electrical module. The electrical module comprises a second printed circuit board having a first and second surface; a lithium battery positioned on the first surface of the second printed circuit board and electrically coupled with the second printed circuit board, a crystal positioned on the first surface of said second printed circuit board and electrically coupled with the second printed circuit board, and an integrated circuit positioned on the second surface of the second printed circuit board.Type: GrantFiled: June 7, 1995Date of Patent: July 15, 1997Assignee: Dallas Semiconductor CorporationInventors: Neil McLellan, Mike Strittmatter, Joseph Patrick Hundt, Christopher M. Sells, Francis A. Scherpenberg
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Patent number: 5587955Abstract: An electronic token has at least two conductive surfaces which form either in total or in part a crush resistant casing in which a semiconductor memory is placed. Coupled to the two conductive surfaces is a set of input logic which is used to detect whether or not the first conductive surface is coupled to a device in which a first voltage or a second voltage is present and in which data can be stored in the semiconductor memory accordingly. Output logic is also provided so as to selectively poll the first conductive surface of said casing towards the second voltage with the output logic being electronically coupled to the semiconductor memory so that data may be retrieved from the stored memory. The stored information may be used for controlling access to items, for example as a lock. It may further be used as an inventory control device, postage control device, currency device for the sale of goods.Type: GrantFiled: December 13, 1994Date of Patent: December 24, 1996Assignee: Dallas Semiconductor CorporationInventors: Robert D. Lee, Stephen M. Curry, Michael L. Bolan, Hal Kurkowski, Donald R. Diaz, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5581507Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.Type: GrantFiled: June 7, 1995Date of Patent: December 3, 1996Assignee: Dallas Semiconductor CorporationInventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
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Patent number: 5579206Abstract: A socket system that comprises a printed circuit board; an electrical module; and a socket having a hollow core. The socket holds the electrical module and is capable of electrically coupling the electrical module to the printed circuit board. The electrical module has at least one electrical lead. The socket has at least one electrical lead capable of electrically coupling with the electrical lead(s) of the electrical module. The electrical module comprises a second printed circuit board having a first and second surface; a lithium battery positioned on the first surface of the second printed circuit board and electrically coupled with the second printed circuit board, a crystal positioned on the first surface of the second printed circuit board and electrically coupled with the second printed circuit board, and an integrated circuit positioned on the second surface of the second printed circuit board. A cap extends around and encloses and seals electrical elements of the electrical module.Type: GrantFiled: September 12, 1994Date of Patent: November 26, 1996Assignee: Dallas Semiconductor CorporationInventors: Neil McLellan, Mike Strittmatter, Joseph P. Hundt, Christopher M. Sells, Francis A. Scherpenberg
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Patent number: 5548550Abstract: A nonvolatile memory, includes multiple nonvolatile registers with each nonvolatile register including memory cells, and further includes circuitry that writes information to each of the nonvolatile registers one at a time, in a rotating order to prolong the prevention of tunneling oxide breakdown.Type: GrantFiled: February 10, 1995Date of Patent: August 20, 1996Assignee: Dallas Semiconductor Corp.Inventors: Gary V. Zanders, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5544063Abstract: A digital controller comprises a register containing control bits and (b) an input node coupled to the register, wherein a first signal at the input node changes a first pattern of the control bits into (i) a second pattern of the control bits when a time interval between the first signal and an immediately preceding second signal is greater than a first time interval or (ii) into a third pattern of the control bits differing from the second pattern when the time interval is less than a second time interval which is less than the first time interval. The register is electrically coupled to a counter, which counts at a variable rate. The control bits controls the variable rate at which the counter counts. A second signal may also selectably change the second pattern of control bits to be changed to a fourth pattern of control bits or the third pattern of control bits to be changed to the fourth pattern of control bits.Type: GrantFiled: August 11, 1992Date of Patent: August 6, 1996Assignee: Dallas Semiconductor CorporationInventors: Gary V. Zanders, Francis A. Scherpenberg
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Patent number: 5528463Abstract: A socket system that comprises a printed circuit board; an electrical module; and a socket having a hollow core. The socket holds the electrical module and is capable of electrically coupling the electrical module to the printed circuit board. The electrical module has at least one electrical lead. The socket has at least one electrical lead capable of electrically coupling with the electrical lead(s) of the electrical module. The electrical module comprises a second printed circuit board having a first and second surface; a lithium battery positioned on the first surface of the second printed circuit board and electrically coupled with the second printed circuit board, a crystal positioned on the first surface of said second printed circuit board and electrically coupled with the second printed circuit board, and an integrated circuit positioned on the second surface of the second printed circuit board.Type: GrantFiled: July 16, 1993Date of Patent: June 18, 1996Assignee: Dallas Semiconductor Corp.Inventors: Neil McLellan, Mike Strittmatter, Joseph P. Hundt, Christopher M. Sells, Francis A. Scherpenberg
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Patent number: 5517470Abstract: A digital rheostat or potentiometer which provides both increment and decrement operations from a single input such as a pushbutton. A certain pattern of input actuations will cause the direction of change to reverse. Settings of the potentiometer are stored in nonvolatile memory.Type: GrantFiled: February 10, 1995Date of Patent: May 14, 1996Assignee: Dallas Semiconductor CorporationInventors: Gary V. Zanders, Francis A. Scherpenberg, Kevin E. Deierling
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Patent number: 5473279Abstract: An integrate circuit companding amplifier for analog signals with digitally controlled gain. The expansion amplifier uses a square law with presentation of sign and the compression amplifier uses the inverse (square root law with preservation of sign). A digital potentiometer determines the gain, and peak detection plus feedback control of the potentiometer provides for automatic gain control. Three wire communication can program a fixed gain.Type: GrantFiled: February 17, 1993Date of Patent: December 5, 1995Assignee: Dallas Semiconductor CorporationInventors: Kevin P. D'Angelo, Francis A. Scherpenberg
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Patent number: 5315549Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.Type: GrantFiled: June 11, 1991Date of Patent: May 24, 1994Assignee: Dallas Semiconductor CorporationInventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
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Patent number: 5218707Abstract: An integrated circuit wherein remapping logic permits the output-driver characteristics of a given pin to changed in software, by changing the data stored in a nonvolatile control bit.Type: GrantFiled: October 28, 1988Date of Patent: June 8, 1993Assignee: Dallas Semiconductor Corp.Inventors: Wendell L. Little, Francis A. Scherpenberg, Clark A. Williams, William J. Podkowa
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Patent number: 5164613Abstract: Reset monitor for detection of power failure and external reset for devices such as microprocessors with the reset monitor providing a single settling time hold down of a reset signal. Preferred embodiments include bandgap reference with high current side compensating resistor, bond out options for analog parameter selection, glitch free state machine control of both detections, and external pushbutton debouncing both depression and release.Type: GrantFiled: July 16, 1991Date of Patent: November 17, 1992Assignee: Dallas Semiconductor CorporationInventors: Eric W. Mumper, Francis A. Scherpenberg, William L. Payne, II
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Patent number: 5010331Abstract: A secure electronic circuit which (in its early life) can be electronically calibrated and written to, but thereafter holds its data securely.Type: GrantFiled: November 14, 1989Date of Patent: April 23, 1991Assignee: Dallas Semiconductor CorporationInventors: Donald R. Dias, Robert D. Lee, Michael L. Bolan, Francis A. Scherpenberg
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Patent number: 4977537Abstract: A nonvolatile memory subsystem includes DRAMs and a battery-backed controller chip. The controller chip monitors the system power supply level to ascertain power fault conditions. When a power fault is detected, the controller provides the DRAMs with both a regulated supply voltage and appropriately timed refresh signals.After the system power supply has returned to specification, the controller continues to generate refresh control signals until the commands it to stop.Type: GrantFiled: September 23, 1988Date of Patent: December 11, 1990Assignee: Dallas Semiconductor CorporationInventors: Donald R. Dias, Francis A. Scherpenberg