Abstract: Embodiments herein describe techniques for a host to provide TX packets to a shared adapter that then uses a NIC to forward the TX packet to a network. In one embodiment, the host creates or fills in one or more TX storage block page entries (SBPE) for the TX packet and stores an index of the TX SBPE in host memory. The host memory can also store an initiative state that tracks whether the shared adapter is currently processing TX packets. If not, the host can issue an interrupt to the shared adapter, along with the index associated with the TX SBPE. The shared adapter can then fetch the TX SBPE from host memory and program the NIC to transmit the TX packet.

Abstract: Embodiments herein describe techniques for establishing data constructs for a data device that enable communication between a host and a shared adapter. A shared adapter facilitates communication with one or more hosts coupled to a NIC. To do so, a host can establish the data device in each operating system that wishes to communicate with the shared adapter. This can include establishing data constructs such as storage block pages, queue indexes, and interrupt registers in the host memory. The host can then transmit a queue description record (QDR) to the shared adapter so the adapter can configure the queues and has the addresses of the data constructs in the host memory.

Abstract: Embodiments of the present disclosure provide systems and methods for implementing enhanced Device Control Block (DCB) scan recovery for channel recovery actions. A disclosed method comprises identifying channels to be recovered and creating a DCB bit array reflecting each DCB to be scanned for the set of the channels to be recovered by a system assist processor. The system assist processor performs asynchronous channel communication area (CCA) recovery processing, starts synchronous DCB scan recovery, and sequentially processes an incremental portion of the DCB bit array interleaved with asynchronous CCA recovery processing. The system assist processor completes asynchronous CCA recovery processing and synchronous DCB scan recovery to complete channel recovery of the set of channels. The system assist processor starts each channel of the set of channels responsive to completing channel recovery processing for each channel.

Abstract: The embodiments herein describe configuring a data device that enables communication between a host and a shared network adapter. The data device can include data connections between the host and the shared network adapter. The data device can have both control queues in a control plane and data queues in a data plane. The control queues can be activated first in order to issue control commands to configure the data plane in the shared network adapter.

Abstract: An example computer-implemented method may include receiving, by a general purpose processor, the I/O operation. The method may further include transmitting, by the general purpose processor, the I/O operation to a system assist processor. The method may further include transmitting, by the system assist processor, the I/O operation to an I/O channel for execution by the I/O channel, wherein transmitting the I/O operation to the I/O channel comprises queuing the I/O operation in the multi-queue. The method may further include executing, by the I/O channel, the I/O operation.

Abstract: Examples of techniques for processing I/O operations in a channel are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: copying, by a system assist processor, a subchannel of the channel into a lower portion of a channel communication area responsive to receiving the I/O operation; copying, by the system assist processor, channel program information from a designated starting location in a customer memory into a control block; building, by the system assist processor, a starting channel communication area into a top portion of the control block; queuing, by the system assist processor, the control block to a queue for the channel; processing, by the channel, the I/O operation responsive to retrieving the control block from the queue.

Abstract: Examples of techniques for queuing an input/output (I/O) operation in a multi-queue are disclosed. In one example implementation according to aspects of the present disclosure, an example computer-implemented method may include receiving, by a general purpose processor, the I/O operation. The method may further include transmitting, by the general purpose processor, the I/O operation to a system assist processor. The method may further include transmitting, by the system assist processor, the I/O operation to an I/O channel for execution by the I/O channel, wherein transmitting the I/O operation to the I/O channel comprises queuing the I/O operation in the multi-queue. The method may further include executing, by the I/O channel, the I/O operation.

Abstract: Examples of techniques for processing I/O operations in a channel are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: copying, by a system assist processor, a subchannel of the channel into a lower portion of a channel communication area responsive to receiving the I/O operation; copying, by the system assist processor, channel program information from a designated starting location in a customer memory into a control block; building, by the system assist processor, a starting channel communication area into a top portion of the control block; queuing, by the system assist processor, the control block to a queue for the channel; processing, by the channel, the I/O operation responsive to retrieving the control block from the queue.

Abstract: Examples of techniques for processing I/O operations in a channel are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include: copying, by a system assist processor, a subchannel of the channel into a lower portion of a channel communication area responsive to receiving the I/O operation; copying, by the system assist processor, channel program information from a designated starting location in a customer memory into a control block; building, by the system assist processor, a starting channel communication area into a top portion of the control block; queuing, by the system assist processor, the control block to a queue for the channel; processing, by the channel, the I/O operation responsive to retrieving the control block from the queue.

Abstract: A computer system includes memory divided into a plurality of logical partitions (LPARs), each LPAR running one of a plurality of instances of an operating system (O/S). The system also includes a processor configured to run a hypervisor program to manage operation of the plurality of LPARs. The processor determines a reference I/O service time of an I/O operation on a server, measures an actual I/O service time of the operation, and determines a delay time of virtualization on the server based on the reference I/O service time and the actual I/O service time.

Abstract: A method includes determining a reference I/O service time of an I/O operation on a server and measuring, with a processor of the server running a hypervisor configured to manage a plurality of logical partitions (LPARs), each LPAR running one of a plurality of instances of an operating system (O/S), an actual I/O service time of the I/O operation. The method also includes determining, by the processor, a delay time of virtualization on the server based on the reference I/O service time and the actual I/O service time.

Abstract: A computer system includes a processor configured for detecting initial command response times of a plurality of paths for transmitting signals from the processor to one or more external devices via a plurality of channels, assigning weighted values to the plurality of paths based on the detected initial command response times, and modifying a frequency at which respective paths among the plurality of paths are selected for transmitting the signals based on the weighted values assigned to the respective paths.

Abstract: A method includes determining a reference I/O service time of an I/O operation on a server and measuring, with a processor of the server running a hypervisor configured to manage a plurality of logical partitions (LPARs), each LPAR running one of a plurality of instances of an operating system (O/S), an actual I/O service time of the I/O operation. The method also includes determining, by the processor, a delay time of virtualization on the server based on the reference I/O service time and the actual I/O service time.

Abstract: A computer system includes memory divided into a plurality of logical partitions (LPARs), each LPAR running one of a plurality of instances of an operating system (O/S). The system also includes a processor configured to run a hypervisor program to manage operation of the plurality of LPARs. The processor determines a reference I/O service time of an I/O operation on a server, measures an actual I/O service time of the operation, and determines a delay time of virtualization on the server based on the reference I/O service time and the actual I/O service time.

Abstract: A computer system includes a processor configured for detecting initial command response times of a plurality of paths for transmitting signals from the processor to one or more external devices via a plurality of channels, assigning weighted values to the plurality of paths based on the detected initial command response times, and modifying a frequency at which respective paths among the plurality of paths are selected for transmitting the signals based on the weighted values assigned to the respective paths.