Patents by Inventor Francis J. Carney, Jr.

Francis J. Carney, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing electronic components
    Patent number: 6436300
    Abstract: A method of manufacturing electronic components includes disposing a top metal layer (502) comprised of solder over a bottom metal layer (201, 202) comprised of titanium or tungsten, and selectively etching the bottom metal layer (201, 202) over the top metal layer (502) with an etchant mixture (601) comprised of an etchant, an additive to control the temperature of the etchant mixture (601), and another additive to reduce the redeposition of the top layer (502).
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: August 20, 2002
    Assignee: Motorola, Inc.
    Inventors: Eric J. Woolsey, Douglas G. Mitchell, George F. Carney, Francis J. Carney, Jr., Cary B. Powell
  • Method of manufacturing electronic components
    Patent number: 6413878
    Abstract: A method of manufacturing electronic components includes disposing a top metal layer (502) comprised of solder over a bottom metal layer (201, 202) comprised of titanium or tungsten, and selectively etching the bottom metal layer (201, 202) over the top metal layer (502) with an etchant mixture (601) comprised of an etchant, an additive to control the temperature of the etchant mixture (601), and another additive to reduce the redeposition of the top layer (502).
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: July 2, 2002
    Assignee: Motorola, Inc.
    Inventors: Eric J. Woolsey, Douglas G. Mitchell, George F. Carney, Francis J. Carney, Jr., Cary B. Powell
  • Method for making semiconductor devices having electroplated leads
    Patent number: 5529682
    Abstract: A method for use with semiconductor devices (47) that have leads (49) electroplated with a solderable metal (53) includes exposing the solderable metal (53) to an elevated temperature sufficient to flow or melt the solderable metal (53). In a preferred embodiment, the solderable metal (53) is exposed to the elevated temperature before the leads (49) are severed from the leadframe (48).
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: June 25, 1996
    Assignee: Motorola, Inc.
    Inventors: James H. Knapp, Francis J. Carney, Jr.