Patents by Inventor Francisco Alcazar
Francisco Alcazar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11852995Abstract: According to examples, an apparatus may include a processor that may identify a first period for a heated system, the first period including a first set of power events and a first zero power event for the heated system and may identify a second period for the heated system, the second period including a second set of power events and a second zero power event for the heated system. The processor may also borrow, from the second period, a portion of a second power event of the second set of power events and may apply the borrowed portion of the second power event to a first power event of the first set of power events during the first period to remove the first zero power event from the first period.Type: GrantFiled: August 31, 2018Date of Patent: December 26, 2023Assignee: Hewlett-Packard Development Company, L.P.Inventors: Robert Yraceburu, Francisco Alcazar, Daniel James Magnusson, Duane A Koehler
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Patent number: 11269275Abstract: According to examples, an apparatus may include a processor and a nontransitory computer readable medium storing machine readable instructions that when executed by the processor may cause the processor to receive a requested power demand from a first heating component and a second heating component, compare the requested power demand to a first threshold, and select a sequencing and stacking group of a plurality of sequencing and stacking groups for the first heating component and the second heating component corresponding to a result of the requested power demand being compared to the first threshold. The instructions may also cause the processor to control application of power to the first heating component and the second heating component according to the selected sequencing and stacking group.Type: GrantFiled: August 31, 2018Date of Patent: March 8, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Duane A Koehler, Robert Yraceburu, Francisco Alcazar, Vladislav Shapoval
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Patent number: 11175721Abstract: According to examples, an apparatus may include instructions that may cause the processor to identify, for a first device state, a first set of active components of a device and to determine a first power demand level of the first set of active components for the first device state. The instructions may also cause the processor to determine that the device is to transition from the first device state to a second device state, to determine, for the second device state, a second set of active components of the device having a second power demand level that is within a predefined difference level of the first power demand level, the predefined difference level to smooth power delivery to the device between the first device state and the second device state, and to control application of power to the second set of active components during the second device state.Type: GrantFiled: August 31, 2018Date of Patent: November 16, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Duane A Koehler, Robert Yraceburu, Francisco Alcazar
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Patent number: 11177954Abstract: An example system includes a secure processing engine. The secure processing engine is to store a host key. The system also includes an integrated circuit in a single package. The integrated circuit includes a firmware engine to execute firmware instructions. The integrated circuit also includes a one-time-programmable (OTP) memory unreadable by the firmware engine. The OTP memory is to store the host key. The integrated circuit also includes a security engine. The security engine is to encrypt and decrypt communications between the firmware engine and the secure processing engine based on the host key.Type: GrantFiled: June 20, 2016Date of Patent: November 16, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: John L McWilliams, Jefferson P Ward, Stephen D Panshin, Francisco Alcazar
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Publication number: 20210245494Abstract: According to examples, an apparatus may include a processor that may identify a first period for a heated system, the first period including a first set of power events and a first zero power event for the heated system and may identify a second period for the heated system, the second period including a second set of power events and a second zero power event for the heated system. The processor may also borrow, from the second period, a portion of a second power event of the second set of power events and may apply the borrowed portion of the second power event to a first power event of the first set of power events during the first period to remove the first zero power event from the first period.Type: ApplicationFiled: August 31, 2019Publication date: August 12, 2021Inventors: Robert Yraceburu, Francisco Alcazar, Daniel James Magnusson, Duane A Koehler
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Publication number: 20210232070Abstract: According to examples, an apparatus may include a processor and a nontransitory computer readable medium storing machine readable instructions that when executed by the processor may cause the processor to receive a requested power demand from a first heating component and a second heating component, compare the requested power demand to a first threshold, and select a sequencing and stacking group of a plurality of sequencing and stacking groups for the first heating component and the second heating component corresponding to a result of the requested power demand being compared to the first threshold. The instructions may also cause the processor to control application of power to the first heating component and the second heating component according to the selected sequencing and stacking group.Type: ApplicationFiled: August 31, 2018Publication date: July 29, 2021Applicant: Hewlett-Packard Development Company, L.P.Inventors: Duane A KOEHLER, Robert YRACEBURU, Francisco ALCAZAR, Vladislav SHAPOVAL
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Publication number: 20210153299Abstract: In some examples, a system includes a first heater and a second heater, and a controller to receive a power request indicating a power level for the second heater, in response to the power request, select a power delivery technique from among different power delivery techniques that employ different ways of delivering power to the first and second heaters, and cause powering of the first and second heaters using the selected power delivery technique.Type: ApplicationFiled: August 21, 2018Publication date: May 20, 2021Inventors: Robert Yraceburu, Duane A Koehler, Francisco Alcazar
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Patent number: 10946674Abstract: A sequence of loads within a system is determined during each of multiple time windows based on a determination of each load's temperature to a target value. The sequencing of the loads involves a determination as to whether the length of each time window is long enough to permit all of the loads to be sequentially activated in order to have their temperatures approximate the corresponding target temperatures. In some cases, the sequence of the loads is determined to be one that results in a monotonically changing power profile.Type: GrantFiled: April 27, 2017Date of Patent: March 16, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Duane A Koehler, Francisco Alcazar, Daniel James Magnusson
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Publication number: 20210070036Abstract: According to examples, an apparatus may include a processor and a nontransitory computer readable medium on which is stored machine readable instructions that are to cause the processor to generate a linear piecewise control signal based on an internal resistance of a heating lamp to control a rate of change of a phase angle of an applied voltage in the heating lamp until a peak current in the heating lamp is within a predefined threshold of a maximum current rating of an alternating current (AC) power source of a circuit.Type: ApplicationFiled: August 31, 2018Publication date: March 11, 2021Inventors: Duane A Koehler, Robert Yraceburu, Francisco Alcazar
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Publication number: 20210055781Abstract: According to examples, an apparatus may include instructions that may cause the processor to identify, for a first device state, a first set of active components of a device and to determine a first power demand level of the first set of active components for the first device state. The instructions may also cause the processor to determine that the device is to transition from the first device state to a second device state, to determine, for the second device state, a second set of active components of the device having a second power demand level that is within a predefined difference level of the first power demand level, the predefined difference level to smooth power delivery to the device between the first device state and the second device state, and to control application of power to the second set of active components during the second device state.Type: ApplicationFiled: August 31, 2018Publication date: February 25, 2021Inventors: Duane A Koehler, Robert Yraceburu, Francisco Alcazar
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Publication number: 20200189294Abstract: A sequence of loads within a system is determined during each of multiple time windows based on a determination of each load's temperature to a target value. The sequencing of the loads involves a determination as to whether the length of each time window is long enough to permit all of the loads to be sequentially activated in order to have their temperatures approximate the corresponding target temperatures. In some cases, the sequence of the loads is determined to be one that results in a monotonically changing power profile.Type: ApplicationFiled: April 27, 2017Publication date: June 18, 2020Applicant: Hewlett-Packard Development Company, L.P.Inventors: Duane A KOEHLER, Francisco ALCAZAR, Danieal James MAGNUSSON
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Publication number: 20190089534Abstract: An example system includes a secure processing engine. The secure processing engine is to store a host key. The system also includes an integrated circuit in a single package. The integrated circuit includes a firmware engine to execute firmware instructions. The integrated circuit also includes a one-time-programmable (OTP) memory unreadable by the firmware engine. The OTP memory is to store the host key. The integrated circuit also includes a security engine. The security engine is to encrypt and decrypt communications between the firmware engine and the secure processing engine based on the host key.Type: ApplicationFiled: June 20, 2016Publication date: March 21, 2019Inventors: John L McWilliams, Jefferson P Ward, Stephen D Panshin, Francisco Alcazar