Patents by Inventor Francisco Andrés Navarro

Francisco Andrés Navarro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7251114
    Abstract: The invention relates to an overvoltage protection circuit comprising an MOV (Metal Oxide Varistor) voltage limiting device (3) which is disposed in series with a GDT (Gas Discharge Tube) voltage limiting device (4). The invention is characterized in that a resistor (5) is disposed in parallel with the aforementioned GDT device (4), the value of said resistor being such that the voltage supported by the GDT device (4) is less than the holdover voltage thereof. In another embodiment of the invention, a second resistor (6) is disposed in parallel with the MOV device (3) and, together with the above-mentioned resistor (5), forms a resistive divider such that the voltage applied the GDT device (4) under steady-state conditions is less than the holdover voltage of the GDT.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: July 31, 2007
    Assignee: Diseno de Sistemas en Silicio, S.A.
    Inventors: Jorge Vicente Blasco Claret, Antonio Poveda Lerma, Antonio Pairet Molina, José Luís González Moreno, Francisco Andrés Navarro
  • Publication number: 20050162801
    Abstract: The invention relates to an overvoltage protection circuit comprising an MOV (Metal Oxide Varistor) voltage limiting device (3) which is disposed in series with a GDT (Gas Discharge Tube) voltage limiting device (4). The invention is characterized in that a resistor (5) is disposed in parallel with the aforementioned GDT device (4), the value of said resistor being such that the voltage supported by the GDT device (4) is less than the holdover voltage thereof. In another embodiment of the invention, a second resistor (6) is disposed in parallel with the MOV device (3) and, together with the above-mentioned resistor (5), forms a resistive divider such that the voltage applied the GDT device (4) under steady-state conditions is less than the holdover voltage of the GDT.
    Type: Application
    Filed: March 22, 2005
    Publication date: July 28, 2005
    Inventors: Jorge Blasco Claret, Antonio Lerma, Antonio Pairet Molina, Jose Luis Gonzalez Moreno, Francisco Andres Navarro