Patents by Inventor Francisco Gamiz

Francisco Gamiz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • RAM memory cell comprising a transistor
    Patent number: 9166051
    Abstract: The invention relates to a memory cell consisting of an isolated MOS transistor having a drain (8), a source (7) and a body region covered with an insulated gate (12), in which the body region is divided through its thickness into two separate regions (13, 14) of opposite conductivity types extending parallel to the plane of the gate, the body region closest to the gate having the opposite conductivity type to that of the drain/source.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: October 20, 2015
    Assignees: Centre National de la Recherche Scientifique, Universidad de Granada
    Inventors: Sorin Ioan Cristoloveanu, Noel Rodriguez, Francisco Gamiz
  • RAM memory point with a transistor
    Patent number: 9099544
    Abstract: A memory cell formed of a semiconductor nanorod having its ends heavily doped to form source and drain regions and having its central portion including, between the source and drain regions, an N-type region surrounded on a majority of its periphery with a quasi-intrinsic P-type region, and wherein the P-type region itself is surrounded with an insulated gate.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: August 4, 2015
    Assignees: UNIVERSIDAD DE GRANADA, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Noel Rodriguez, Francisco Gamiz, Sorin Ioan Cristoloveanu
  • RAM MEMORY POINT WITH A TRANSISTOR
    Publication number: 20140299835
    Abstract: A memory cell formed of a semiconductor nanorod having its ends heavily doped to form source and drain regions and having its central portion comprising, between the source and drain regions, an N-type region surrounded on a majority of its periphery with a quasi-intrinsic P-type region, and wherein the P-type region itself is surrounded with an insulated gate.
    Type: Application
    Filed: October 4, 2012
    Publication date: October 9, 2014
    Applicants: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSIDAD DE GRANADA
    Inventors: Noel Rodriguez, Francisco Gamiz, Sorin Loan Cristoloveanu
  • RAM MEMORY CELL COMPRISING A TRANSISTOR
    Publication number: 20130148441
    Abstract: The invention relates to a memory cell consisting of an isolated MOS transistor having a drain (8), a source (7) and a body region covered with an insulated gate (12), in which the body region is divided through its thickness into two separate regions (13, 14) of opposite conductivity types extending parallel to the plane of the gate, the body region closest to the gate having the opposite conductivity type to that of the drain/source.
    Type: Application
    Filed: April 7, 2011
    Publication date: June 13, 2013
    Applicants: Universidad de Granada, Centre National de la Recherche Scientifique
    Inventors: Sorin Ioan Cristoloveanu, Noel Rodriguez, Francisco Gamiz
  • RAM MEMORY ELEMENT WITH ONE TRANSISTOR
    Publication number: 20120113730
    Abstract: A memory element includes a MOS transistor having a drain, a source and a body region covered by an insulated gate, wherein the thickness of the body region is divided into two distinct regions separated by a portion of an insulating layer extending parallel to the plane of the gate.
    Type: Application
    Filed: April 13, 2010
    Publication date: May 10, 2012
    Applicants: Centre National de la Recherche Scientifique, Universiadad de Granada
    Inventors: Sorin Ioan Cristoloveanu, Noel Rodriguez, Francisco Gamiz