Abstract: Certain aspects of the present disclosure provide techniques and apparatus for calibrating radio frequency (RF) circuits using machine learning. One example method generally includes calibrating a first subset of RF circuit calibration parameters. Values are predicted for a second subset of RF circuit calibration parameters based on a machine learning model and the first subset of RF circuit calibration parameters. The second subset of RF circuit calibration parameters may be distinct from the first subset of RF circuit calibration parameters. At least the first subset of RF circuit calibration parameters is verified, and after the verifying, at least the first subset of RF circuit calibration parameters are written to a memory associated with the RF circuit.

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for calibrating radio frequency (RF) circuits using machine learning. One example method generally includes calibrating a first subset of RF circuit calibration parameters. Values are predicted for a second subset of RF circuit calibration parameters based on a machine learning model and the first subset of RF circuit calibration parameters. The second subset of RF circuit calibration parameters may be distinct from the first subset of RF circuit calibration parameters. At least the first subset of RF circuit calibration parameters is verified, and after the verifying, at least the first subset of RF circuit calibration parameters are written to a memory associated with the RF circuit.

Abstract: When forming semiconductor devices, plasma-induced damage may be prevented or restricted by providing a conductive path between critical areas and the substrate of the semiconductor device. According to the present disclosure, a negative effect of any such protective structures on the performance of the semiconductor device may be significantly reduced by permanently interrupting the corresponding electrical connection at any appropriate point in time of the manufacturing sequence. Furthermore, respective fuse structures acting as current-sensitive areas may also be implemented in test structures in order to evaluate plasma-induced currents, thereby providing a possibility for a more efficient design of respective protective structures and/or for contributing to superior process control of critical plasma treatments.

Abstract: When forming semiconductor devices, plasma-induced damage may be prevented or restricted by providing a conductive path between critical areas and the substrate of the semiconductor device. According to the present disclosure, a negative effect of any such protective structures on the performance of the semiconductor device may be significantly reduced by permanently interrupting the corresponding electrical connection at any appropriate point in time of the manufacturing sequence. Furthermore, respective fuse structures acting as current-sensitive areas may also be implemented in test structures in order to evaluate plasma-induced currents, thereby providing a possibility for a more efficient design of respective protective structures and/or for contributing to superior process control of critical plasma treatments.

Abstract: Various apparatuses and methods for protecting a transmitter from electrostatic discharge are disclosed herein. For example, some embodiments provide an apparatus including a first ESD clamp connected to an antenna input, a first reactive component connected to the first ESD clamp, a second ESD clamp connected to the first reactive component, and a second reactive component connected between the second ESD clamp and the transmitter.

Abstract: Various apparatuses and methods for protecting a transmitter from electrostatic discharge are disclosed herein. For example, some embodiments provide an apparatus including a first ESD clamp connected to an antenna input, a first reactive component connected to the first ESD clamp, a second ESD clamp connected to the first reactive component, and a second reactive component connected between the second ESD clamp and the transmitter.

Abstract: A low bandwidth signal path is added to copy internal node DC signal to output node. Therefore, for a DC or low frequency signal, the output signal is controlled by this loop. On the other hand, a high frequency signal is not affected because of the low-bandwidth of added loop. Thus, both DC and AC coupling modes are realized for components such as low-voltage video drivers.