Patents by Inventor Francisco Machuca
Francisco Machuca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10545087Abstract: Embodiments as disclosed herein may provide a sensor system including a container, such as a bag, having a port assembly integrated therewith. The port assembly includes an optically transparent window and be configured such that a sensor may be mechanically attached to the port assembly to interface with the optical window. The sensor may include an index of refraction (IoR) sensor that measures the chemical concentration of a liquid inside the container based on a refractive index.Type: GrantFiled: March 17, 2015Date of Patent: January 28, 2020Assignee: ENTEGRIS, INC.Inventors: Francisco Machuca, Ronald P. Chiarello, Stuart A. Tison
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Publication number: 20190051517Abstract: A multilayer semiconductor structure including at least in part a substrate and an III-N film layer. The substrate's constant of thermal expansion being substantially matched to the III-N film's constant of thermal expansion. The multilayer semiconductor structure may also include a crystal matching layer that has a lattice constant that substantially matches the lattice of constant of the III-N film. By not relying on the substrate for lattice matching the III-N film, the multilayer structure allows greater flexibility in the selection of an applicable substrate.Type: ApplicationFiled: October 5, 2018Publication date: February 14, 2019Inventor: Francisco MACHUCA
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Publication number: 20190044029Abstract: A multilayer structure comprising a crystal matching layer deposited on a substrate. The crystal matching layer is capable of being used as an ohmic contact, thermal heat sink, and reflective layer. The unique properties of the crystal matching layer allows for the reduction of size of semiconductor devices, a reduction in the fabrication time of semiconductor devices, high current capabilities, high voltage standoff capabilities, and other advantages.Type: ApplicationFiled: October 9, 2018Publication date: February 7, 2019Inventors: Francisco Machuca, Robert Weiss
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Publication number: 20180158672Abstract: A multilayer semiconductor structure including at least in part a substrate and an III-N film layer. The substrate's constant of thermal expansion being substantially matched to the III-N film's constant of thermal expansion. The multilayer semiconductor structure may also include a crystal matching layer that has a lattice constant that substantially matches the lattice of constant of the III-N film. By not relying on the substrate for lattice matching the III-N film, the multilayer structure allows greater flexibility in the selection of an applicable substrate.Type: ApplicationFiled: January 19, 2018Publication date: June 7, 2018Inventor: Francisco Machuca
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Publication number: 20170108427Abstract: Embodiments as disclosed herein may provide a sensor system including a container, such as a bag, having a port assembly integrated therewith. The port assembly includes an optically transparent window and be configured such that a sensor may be mechanically attached to the port assembly to interface with the optical window. The sensor may include an index of refraction (IoR) sensor that measures the chemical concentration of a liquid inside the container based on a refractive index.Type: ApplicationFiled: March 17, 2015Publication date: April 20, 2017Inventors: Francisco Machuca, Ronald P. Chiarello, Stuart A. Tison
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Publication number: 20160380154Abstract: A multilayer structure comprising a crystal matching layer deposited on a substrate. The crystal matching layer is capable of being used as an ohmic contact, thermal heat sink, and reflective layer. The unique properties of the crystal matching layer allows for the reduction of size of semiconductor devices, a reduction in the fabrication time of semiconductor devices, high current capabilities, high voltage standoff capabilities, and other advantages.Type: ApplicationFiled: June 27, 2016Publication date: December 29, 2016Inventors: Francisco Machuca, Robert Weiss
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Publication number: 20160380045Abstract: A multilayer semiconductor structure including at least in part a substrate and an III-N film layer. The substrate's constant of thermal expansion being substantially matched to the III-N film's constant of thermal expansion. The multilayer semiconductor structure may also include a crystal matching layer that has a lattice constant that substantially matches the lattice of constant of the III-N film. By not relying on the substrate for lattice matching the III-N film, the multilayer structure allows greater flexibility in the selection of an applicable substrate.Type: ApplicationFiled: May 20, 2016Publication date: December 29, 2016Inventors: Francisco Machuca, Robert Weiss
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Patent number: 9487885Abstract: A process for separating a substrate from an epitaxial layer comprises forming a multilayer substrate comprising a substrate, a lattice matching layer and an epitaxial layer. The method further comprises etching the lattice matching layer by one of a liquid or a vapor phase acid. The lattice matching layer is a metal alloy between the substrate and the epitaxial layer and serves as an etching release layer. The substrate can also be separated from an epitaxial layer by laser lift off process. The process comprises forming a multilayer substrate comprising a substrate, a lattice matching layer and an epitaxial layer, directing laser light at the lattice matching layer, maintaining the laser light on the lattice matching layer for a sufficient period of time so that it is absorbed by free electrons in the lattice matching layer to allow decomposition of the lattice matching layer.Type: GrantFiled: December 13, 2013Date of Patent: November 8, 2016Assignee: Tivra CorporationInventors: Francisco Machuca, Indranil De
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Publication number: 20150167198Abstract: A process for separating a substrate from an epitaxial layer comprises forming a multilayer substrate comprising a substrate, a lattice matching layer and an epitaxial layer. The method further comprises etching the lattice matching layer by one of a liquid or a vapor phase acid. The lattice matching layer is a metal alloy between the substrate and the epitaxial layer and serves as an etching release layer. The substrate can also be separated from an epitaxial layer by laser lift off process. The process comprises forming a multilayer substrate comprising a substrate, a lattice matching layer and an epitaxial layer, directing laser light at the lattice matching layer, maintaining the laser light on the lattice matching layer for a sufficient period of time so that it is absorbed by free electrons in the lattice matching layer to allow decomposition of the lattice matching layer.Type: ApplicationFiled: December 13, 2013Publication date: June 18, 2015Applicant: TIVRA CORPORATIONInventors: Francisco Machuca, Indranil De
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Patent number: 8956952Abstract: A multilayer substrate structure comprises a substrate, a thermal matching layer formed on the substrate and a lattice matching layer above the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum-oxynitrides, silicon, silicon carbide, zinc oxides, and rare earth oxides. The lattice matching layer includes a first chemical element and a second chemical element to form an alloy. The first and second chemical element has similar crystal structures and chemical properties. The coefficient of thermal expansion of the thermal matching layer and the lattice parameter of the lattice matching layer are both approximately equal to that of a member of group III-V compound semiconductors. The lattice constant of the lattice matching layer is approximately equal to that of a member of group III-V compound semiconductor.Type: GrantFiled: March 11, 2013Date of Patent: February 17, 2015Assignee: Tivra CorporationInventors: Francisco Machuca, Indranil De
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Publication number: 20130334568Abstract: A multilayer substrate structure comprises a substrate, a thermal matching layer formed on the substrate and a lattice matching layer above the thermal matching layer. The thermal matching layer includes at least one of molybdenum, molybdenum-copper, mullite, sapphire, graphite, aluminum-oxynitrides, silicon, silicon carbide, zinc oxides, and rare earth oxides. The lattice matching layer includes a first chemical element and a second chemical element to form an alloy. The first and second chemical element has similar crystal structures and chemical properties. The coefficient of thermal expansion of the thermal matching layer and the lattice parameter of the lattice matching layer are both approximately equal to that of a member of group III-V compound semiconductors. The lattice constant of the lattice matching layer is approximately equal to that of a member of group III-V compound semiconductor.Type: ApplicationFiled: March 11, 2013Publication date: December 19, 2013Applicant: TIVRA CORPORATIONInventors: FRANCISCO MACHUCA, INDRANIL DE
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Publication number: 20130333611Abstract: A lattice matching layer for use in a multilayer substrate structure comprises a lattice matching layer. The lattice matching layer includes a first chemical element and a second chemical element. Each of the first and second chemical elements has a hexagonal close-packed structure at room temperature that transforms to a body-centered cubic structure at an ?-? phase transition temperature higher than the room temperature. The hexagonal close-packed structure of the first chemical element has a first lattice parameter. The hexagonal close-packed structure of the second chemical element has a second lattice parameter. The second chemical element is miscible with the first chemical element to form an alloy with a hexagonal close-packed structure at the room temperature. A lattice constant of the alloy is approximately equal to a lattice constant of a member of group III-V compound semiconductors.Type: ApplicationFiled: March 11, 2013Publication date: December 19, 2013Applicant: Tivra CorporationInventors: Indranil De, Francisco Machuca
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Publication number: 20120286806Abstract: A substrate is electromagnetically coupled into an inductance-capacitance resonant circuit formed from (i) a member comprising a ferromagnetic material, (ii) an inductor and (iii) the substrate. The substrate is illuminated for a first time period X to cause photoconduction in the substrate. Decay in conductivity of the substrate is monitored for a second time period Y. The ratio of X to Y is greater than 1:10. Bulk lifetime of the substrate is determined from the decay.Type: ApplicationFiled: November 9, 2011Publication date: November 15, 2012Inventors: Francisco Machuca, Ronald Chiarello, G. Lorimer Miller, Joseph W. Foster, David C. Tigwell, David Cornwell
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Publication number: 20120240843Abstract: A method and system is disclosed for making ultra thin wafer(s) or thin film(s) of c-Si on demand. One aspect of certain embodiments includes using a planar seed or crystal template in combination with shaped scanning heat sources to produce an intermediate seed or secondary crystal template, and finally producing an ultra thin wafer or thin film with a single crystal structure over an arbitrary area and film thickness starting from an initial low quality Si coating.Type: ApplicationFiled: March 22, 2011Publication date: September 27, 2012Inventor: Francisco Machuca
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Publication number: 20120081132Abstract: An apparatus includes a member including a ferromagnetic material, an inductance-capacitance resonant circuit, a substrate disposed relative to the member, and a plurality of radiation sources. The member includes a post disposed at its center and a surface extending to an outer wall. The member defines a gap between the post and the outer wall. The inductance-capacitance resonant circuit is configured to resonate at a measurement frequency. The circuit includes an inductor disposed relative to the post. The substrate is disposed relative to the member. The substrate is electromagnetically coupled to the inductor. The plurality of radiation sources is disposed radially outward from and circumferentially around the post of the member. The apparatus can be used to simultaneously measure conductance (inverse sheet resistance), steady state photoconductance, true steady state minority carrier lifetime, photoconductance build-up and photoconductance decay lifetime.Type: ApplicationFiled: April 5, 2011Publication date: April 5, 2012Applicant: MKS Instruments, Inc.Inventors: Francisco Machuca, Ronald Chiarello, G. Lorimer Miller, Joseph W. Foster, David C. Tigwell
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Patent number: 7455565Abstract: Improved photocathodes are provided by a fabrication method including steps of wet chemically cleaning the photocathode emission surface (to reduce the level of cleaning-induced surface damage), two stage heat treatment (to complete the cleaning without desorbing nitrogen from the emission surface), followed by activation with Cs only, as opposed to Cs—O. The resulting photocathodes have improved performance (lifetime, brightness, efficiency) compared to conventional photocathodes, and are thus attractive candidates for demanding photocathode applications.Type: GrantFiled: March 16, 2006Date of Patent: November 25, 2008Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Francisco Machuca, Zhi Liu
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Patent number: 7446320Abstract: One embodiment relates to an electronically-variable electrostatic immersion lens in an electron beam apparatus. The electrostatic immersion lens includes a top electrode configured with a first voltage applied thereto, an upper bottom electrode configured with a second voltage applied thereto, and a lower bottom electrode configured with a third voltage applied thereto. The third voltage is controlled separately from the second voltage. Other embodiments are also disclosed.Type: GrantFiled: October 26, 2005Date of Patent: November 4, 2008Assignee: KLA-Tencor Technologies CorproationInventors: Mark A. McCord, Kirk J. Bertsche, Francisco Machuca
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Publication number: 20060170324Abstract: Improved photocathodes are provided by a fabrication method including steps of wet chemically cleaning the photocathode emission surface (to reduce the level of cleaning-induced surface damage), two stage heat treatment (to complete the cleaning without desorbing nitrogen from the emission surface), followed by activation with Cs only, as opposed to Cs—O. The resulting photocathodes have improved performance (lifetime, brightness, efficiency) compared to conventional photocathodes, and are thus attractive candidates for demanding photocathode applications.Type: ApplicationFiled: March 16, 2006Publication date: August 3, 2006Inventors: Francisco Machuca, Zhi Liu
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Publication number: 20060055321Abstract: A photocathode is capable of generating an electron beam from incident light. The photocathode comprises a light permeable support having a light receiving surface and an opposing surface. A Group III nitride layer is provided on the opposing surface of the support. The Group III nitride layer comprises at least one Group III element and nitrogen. An alkali halide layer is provided on the Group III nitride layer. The alkali halide can be a cesium halide, such as cesium bromide or iodide.Type: ApplicationFiled: March 25, 2005Publication date: March 16, 2006Inventors: Juan Maldonado, Francisco Machuca, Steven Coyle