Abstract: A module comprises a bus invert encoder (24) for determining whether a set of data bits should be inverted prior to transmission over a communication bus. The bus invert encoder (24) produces a bus invert signal BI which controls a selective inversion means (28), for example a multiplexer. A partial fault detection encoder (32) determines one or more temporary check bits from the set of data bits, substantially in parallel with the bus invert encoder (24). Thus, the one or more temporary check bits are determined based on the assumption that the set of data bits are to be transmitted without inversion from the selective inversion means (28). A logic unit (34) is provided for correcting the one or more temporary check bits, if necessary, based on the bus invert signal produced by the bus invert encoder (24).

Abstract: A module comprises a bus invert encoder (24) for determining whether a set of data bits should be inverted prior to transmission over a communication bus. The bus invert encoder (24) produces a bus invert signal BI which controls a selective inversion means (28), for example a multiplexer. A partial fault detection encoder (32) determines one or more temporary check bits from the set of data bits, substantially in parallel with the bus invert encoder (24). Thus, the one or more temporary check bits are determined based on the assumption that the set of data bits are to be transmitted without inversion from the selective inversion means (28). A logic unit (34) is provided for correcting the one or more temporary check bits, if necessary, based on the bus invert signal produced by the bus invert encoder (24).

Abstract: In a non-volatile memory, the word lines (6) are closely spaced without the usual field oxide or trench isolation between adjacent word lines. In a virtual ground embodiment, the surface area of one cell may be reduced thereby to practically 2F2, F being the minimum photolithographically-limited process dimension. In a NMOS embodiment, in which a nitride layer (8) is used for storing electric charge representing data, the packing density may be doubled evenly, by storing two bits per cell, thus reducing the area to F2 per bit. This can be achieved by reversing the read current with respect to the write current.

Abstract: In a non-volatile memory, the word lines (6) are closely spaced without the usual field oxide or trench isolation between adjacent word lines. In a virtual ground embodiment, the surface area of one cell may be reduced thereby to practically 2F2, F being the minimum photolithographically-limited process dimension. In a NMOS embodiment, in which a nitride layer (8) is used for storing electric charge representing data, the packing density may be doubled evenly, by storing two bits per cell, thus reducing the area to F2 per bit. This can be achieved by reversing the read current with respect to the write current.

Abstract: A non-volatile, random access memory cell comprises first and second inverters each having an output node cross-coupled by cross-coupling means to an input node of the other inverter for forming a MOS RAM cell. The output node of each inverter is selectively connected via the conductor paths of separate access transistors to respective bit lines. The control electrodes of the access transistors are connected to a common word line. In particular, both RAM and programmable Read-Only operation of said memory cell are provided. Thereto, the cross-coupling comprises capacitors (C1, C2) each in series with a control electrode of a respective p-type transistor of the first and second inverters. This renders both interconnecting nodes between a capacitor and the gate electrode of its associated p-channel transistor floating. Isolators around these nodes render the cell data-retentive. The nodes are transiently and electrically programmable through signals on the bit and word lines of the cell.

Abstract: The invention proposes a simple method to lower the threshold voltage of UV erased EPROM and OTP memories. During the erasure, a voltage is applied to the control gate (10) or wordline (2) which is on-chip generated as a photovoltage by means of photodiode (12) irradiated by radiation (15) during erasure. Because the wordlines are coupled to further zones forming photosensitive pn-junctions in the semiconductor body, measures are taken to prevent that, due to charge transport across said junctions, the generated photovoltage is decreased too strongly.

Abstract: An image processing system creates a 2-dimensional output image with enhanced depth sensation by operating on a 2-dimensional input image. The system processes the input image non-uniformly by selecting an area in the input image according to a predetermined criterion, and changing a property, e.g., its brightness, of the area relative to a corresponding property of a complement of the area in the input image.

Abstract: A very thin gate oxide is preferably used in non-volatile memories with floating gates for limiting the programming voltage. The minimum thickness of the gate oxide, however, is bound to certain limits in conventional memories because, if the oxide thickness is too small, the loss of charge from a programmed cell would become too great. The gate oxide is thicker than 7 nm in conventional memories for this reason. A non-volatile memory cell according to the invention comprises a gate oxide 9 with a thickness of no more than approximately 6 nm in combination with a p-type floating gate electrode 8. A lower programming voltage can be used thanks to the thin gate oxide, while a good data retention is maintained. The loss of charge is low because the electrons applied to the floating gate during programming recombine there with holes and are bound to the ionized acceptor atoms at a comparatively great distance from the interface between gate and oxide.

Abstract: A method is set forth of manufacturing a silicon body (5) having an n-type top layer (1') and an adjoining, more highly doped n-type base layer (2'), by which a first, n-type silicon slice (1) and a second, more highly doped n-type silicon slice (2) are put one on the other and then bonded together by heating. To obtain a low contact resistance between top layer (1') and base layer (2'), a boundary layer having a higher doping than the to player (1') is provided in the top layer (1') adjoining the base layer (2'). According to the invention, the boundary layer is formed by diffusion of an n-type dopant (11, 14) into the first slice (1) from the second slice (2) during heating. The concentration of the n-type dopant (11, 14) is taken to be so high in this case that boron (12) present as an impurity is overdoped, so that undesired pn transitions cannot occur.

Abstract: A device for measuring magnetic fields comprises an assembly of at least two magnetic field sensors each of which comprises a number of magnetoresistive sensor elements situated in one plane and which have the same privileged directions of magnetization, said sensor elements being connected to a power supply circuit and to a signal processing circuit. The privileged directions of magnetization of the sensor elements of different magnetic field sensors are different. The assembly of magnetic field sensors is arranged within a magnetization coil made of a number of turns of an electric conductor extending around a central axis so as to generate an auxiliary magnetic field extending parallel to the central axis.

Abstract: A device for determining the displacement of a vehicle on wheels which are connected to a body via a wheel suspension. The device includes apparatus for measuring a quantity which is indicative of the instantaneous vertical velocity of a wheel relative to the body. Using this quantity, the vertical component of the wheel displacement is eliminated so that in the event of a bumpy road surface a higher accuracy is obtained for determining the displacement of the vehicle body.

Abstract: A magnetic field sensor includes a number of magnetoresistive sensor elements situated in one plane, and which have the same privileged directions of magnetization, and a magnetization coil connected to a current pulse generator which alternately supplies the magnetization coil with opposite current pulses to generate a magnetic field which extends parallel to the privileged directions of the sensor elements and is strong enough to reverse the direction of internal magnetization thereof The magnetization coil includes an electrically insulating substrate which supports an approximately spiral-shaped electric conductor track including a group of parallel arranged active conductor elements. An electric current flows through the conductor track in the same direction in all active conductor elements of the relevant group.

Abstract: The invention relates to a semiconductor device with which input signals can be weighted and the weighted input signals can be summed, and which in conjunction with a neuron can be used, for example, as a synapse in a neural network. The device comprises a number of switched capacitances with a common capacitor plate formed by a surface region 3 in a p-type substrate 1. The region 3 is connected to the inverting input of an amplifier 11 whose +input is connected to a reference voltage and whose output 12 supplies the summed output signal. The output 12 can be fed back to the input 3 via switch S. The other plate of the capacitances is formed by an electrode 6a, 6b, 6c, which can be switched between a reference voltage and an input source. The weight factors are stored in the form of electric charges on a floating gate 5a, 5b, 5c, which is provided between each input electrode 6 and the surface region 3.

Abstract: The invention provides a signal processing device including sampling means (31, 41, 32) for sampling an input signal in the form of charge carrier packages and a shift register (4) having an input region (41) to which a signal sample is offered during operation, and provided with transport means (2) for transporting the signal sample to an output region (42) of the shift register. The device according to the invention is capable of adapting itself to the frequency with which the input signal is sampled in such a way that the storage of the increase in signal samples which accompanies an increase in the sampling frequency does not require additional space. For this purpose, according to the invention, the shift register comprises a transport channel (4) in which an electron-hole liquid can exist. The sampling means (31, 41, 32) are capable of sampling the input signal in the form of electron-hole droplets (71 . . .

Abstract: A semiconductor device includes a silicon layer of a first conductivity type, which is disposed on a dielectric substrate and in which at least two zones of a semiconductor circuit element of a second opposite conductivity type and a contact zone having the same conductivity type as, but a higher doping concentration than the silicon layer are provided, which zones adjoin a surface of the silicon layer. According to the invention, the contact zone extends below the zones of the field effect transistor. This semiconductor device has the advantage that it can be manufactured in a very simple manner. In a method of manufacturing this device, in a silicon layer of a first conductivity type disposed on a dielectric substrate are formed a contact zone having the same conductivity type as, but a higher doping concentration than the silicon layer and at least two zones of a semiconductor circuit element of a second opposite conductivity type.

Abstract: A semiconductor device includes a silicon layer of a first conductivity type, which is disposed on a dielectric substrate and in which at least two zones of a semiconductor circuit element of a second opposite conductivity type and a contact zone having the same conductivity type as, but a higher doping concentration than the silicon layer are provided, which zones adjoin a surface of the silicon layer. According to the invention, the contact zone extends below the zones of the field effect transistor. Thus, it is counteracted that at an interface of the silicon layer and the substrate a channel is formed which shortcircuits the zones. Moreover, the semiconductor device has a constant threshold voltage. This semiconductor device has the additional advantage that it can be manufactured in a very simple manner.