Abstract: Techniques for degrading rendering performance to extend operating time of a computing platform includes determining a source and a level of power for the computing platform during receipt of the graphics data and rendering of the graphics data. Graphics data is rendered using settings received from the application if the computing platform is not operating from a limited power supply. The graphics data is rendered using one or more sets of graphics processing power conservation rendering settings if the computing platform is operating from a limited power supply and the remaining energy capacity of the limited power supply is less than one or more predetermined levels.

Abstract: Embodiments of the present invention are directed to provide novel methods and a system for adaptive resolution rendering via scaling in a multiple graphics processor system. A method is described herein that maintains a constant framerate by reducing the resolution of the graphical output rendered in one graphics processor and using another graphics processor in the same computing system to scale the already-rendered output to its original intended resolution when the framerate drops below a desired threshold.

Abstract: A method for transferring graphics data includes receiving graphics data in the system memory. The graphics data may be loaded into system memory by and application from a mass storage device. One or more graphics commands associated with the graphics data may also be received. The graphics commands may also be received from the application. The graphics data in system memory is compressed in response to receipt of the one or more graphics commands before the graphics data is transferred to a discrete graphics processing unit. The one or more received graphics commands are transferred to the discrete graphics processing unit. The one or more graphics commands include an operation to copy the compressed graphics data to the discrete graphics processing unit. The compressed graphics data is copied from the system memory to memory of the graphics processing. The compressed graphics data is then decompressed by the graphics processing unit.

Abstract: The graphics co-processing technique includes receiving display operation for execution by a graphics processing unit on an unattached adapter. The display operation is split into an encrypt content by the graphics processing unit on the unattached adapter, a copy from a frame buffer of the graphics processing unit on the unattached adapter to a buffer in system memory, a copy from the buffer in system memory to a frame buffer of graphics processing unit on a primary adapter, a decrypt the encrypted content in the frame buffer of the graphics processing unit on the primary adapter, and a present from the frame buffer of the graphics processing unit on the primary adapter to a display. Execution of the copy from the frame buffer of the graphics processing unit on the unattached adapter to the buffer in system memory and the copy from the buffer in system memory to the frame buffer of the graphics processing unit on the primary adapter are synchronized.

Abstract: A system and method for graphics processing unit (GPU) based encryption of data storage. The method includes receiving a write request, which includes write data, at a graphics processing unit (GPU) encryption driver and storing the write data in a clear data buffer. The method further includes encrypting the write data with a GPU to produce encrypted data and storing the encrypted data in an encrypted data buffer. The encrypted data in the encrypted data buffer is sent to an IO stack layer operable to send the request to a data storage device. GPU implemented encryption and decryption relieves the CPU from these tasks and yield better overall performance.

Abstract: Embodiments of the present invention are directed to provide a method and system for automatically applying artificial limits to display resolutions in a computing system to improve performance. Embodiments are described herein that automatically limits the display resolution of an application executing in a discrete graphics processing unit operating from configurations with limited means of data transfer to the system memory. By automatically limiting the resolution in certain detected circumstances, the rate of generated graphics data may be dramatically increased. Another embodiment is also provided which allows for the automatic detection of an application's initialization and pro-actively limiting the user-selectable resolutions in which the output of the application may be displayed in to a maximum resolution calculated for optimal performance. The application's termination is also detected, whereupon a comprehensive list of supported resolutions becomes available.

Abstract: In typical embodiments a three GPU configuration is provided comprising three discrete video cards, each connected to a standard monitor placed horizontally for a 3× horizontal resolution. In this configuration, depending on the load on each GPU, the vertical split lines are dynamically adjusted. To adjust the load balancing according to these virtual split lines, the rendering clip rectangle of each GPU is adjusted, in order to reduce the number of pixels rendered by the heavily loaded GPU. These split lines define the boundary of the scene to be rendered by each GPU, and, according to some embodiments, may be moved horizontally. Thus for example if a GPU has a more complex rendering clip polygon to render than the other GPUs, the neighboring GPUs may render the rendering clip polygon it displays plus a portion of the rendering clip polygon to be displayed by heavily loaded GPU.

Abstract: The graphics processing technique includes detecting a transition from rendering graphics on a first graphics processing unit to a second graphics processing, by a hybrid driver. The hybrid driver, in response to detecting the transition, configures the first graphics processing unit to create a frame buffer. Thereafter, an image rendered on the second graphics processing unit may be copied to the frame buffer of the first graphics processing unit. The rendered image in the frame buffer may then be scanned out on the display.

Abstract: Embodiments of the present invention are directed to provide a method and system for applying automatic power conservation techniques in a computing system. Embodiments are described herein that automatically limits the frame rate of an application executing in a discrete graphics processing unit operating off battery or other such exhaustible power source. By automatically limiting the frame rate in certain detected circumstances, the rate of power consumption, and thus, the life of the current charge stored in a battery may be dramatically extended. Another embodiment is also provided which allows for the more effective application of automatic power conservation techniques during detected periods of inactivity by applying a low power state immediately after a last packet of a frame is rendered and displayed.

Abstract: Embodiments of the claimed subject matter are directed to systems and a method that allows the aggregation of multiple interfaces of a single data communication bus to provide greater bandwidth for communication between a peripheral device and system memory within a computing system. In one embodiment, a system is provided wherein the unoccupied interfaces of the data communication bus is aggregated with an occupied interface coupled to a peripheral device to increase the bandwidth of data transfer requests between the peripheral device and the system memory.

Abstract: The graphics co-processing technique includes loading a device specific kernel mode driver of a second graphics processing unit tagged as a non-graphics device. A device driver interface and a device specific kernel mode driver is loaded and initialized for a graphics processing unit on a primary adapter. A device driver interface and a device specific kernel mode driver for a graphics processing unit on the non-graphics tagged adapter is also loaded and initialized without the device driver interface talking back to a runtime application programming interface when a particular version of an operating system would not otherwise allow the device specific kernel mode driver for the second graphics processing unit to be loaded.

Abstract: The graphics co-processing technique includes loading and initializing a device driver interface and a device specific kernel mode driver for a graphics processing unit on a primary adapter. A device driver interface and a device specific kernel mode driver for a graphics processing unit on an unattached adapter is also loaded and initialized without the device driver interface talking back to a runtime application programming interface or a thunk layer when a particular versions of an operating system will not allow the device driver interface on the unattached adapter to be loaded.

Abstract: The graphics co-processing technique includes receiving display operation for execution by a graphics processing unit on an unattached adapter. The display operation is split into a copy from a frame buffer of the graphics processing unit on the unattached adapter to a buffer in system memory, a copy from the buffer in system memory to a frame buffer of graphics processing unit on a primary adapter, and a present from the frame buffer of the graphics processing unit on the primary adapter to a display. Execution of the copy from the frame buffer of the graphics processing unit on the unattached adapter to the buffer in system memory and the copy from the buffer in system memory to the frame buffer of the graphics processing unit on the primary adapter are synchronized.

Abstract: The graphics co-processing technique includes loading a shim layer library. The shim layer library loads and initializes a device driver interface of a first class on the primary adapter and a device driver interface of a second class on an unattached adapter. The shim layer also translates calls between the first device driver interface of the first class on the primary adapter and the second device driver interface of the second class on the unattached adapter.

Abstract: The graphics co-processing technique includes receiving a selection of a given application. A graphical user interface, including an item for selecting executing the given application on a second graphics processing unit, is generated in response to the selection of the given application. A device driver interface and a device specific kernel mode driver for a graphics processing unit on a primary adapter is loaded and initialized. In addition, a device driver interface and a device specific kernel mode driver for a graphics processing unit on an unattached adapter is loaded and initialized, if executing the given application on the second graphics processing unit is selected, without the device driver interface talking back to a runtime application programming interface when a particular version of an operating system will not allow the device driver interface on the unattached adapter to be loaded.

Abstract: The graphics co-processing technique includes rendering a frame of red, green, blue (RGB) data on a graphics processing unit on an unattached adapter. The frame of RGB data are converted on the graphics processing unit on the unattached adapter to luminance-color difference (YUV) data. The YUV data is copied from frame buffers of the graphics processing unit on the unattached adapter to buffers in system memory. The YUV data is copied from the buffers in the system memory to texture buffers of a graphics processing unit on a primary adapter. A frame of RGB data is recovered from the YUV data in the texture buffer of the graphics processing unit on the primary adapter. The recovered frame of RGB data may then be presented by the graphics processing unit on the primary adapter on the primary display.

Abstract: A system for processing video data includes a host processor, a first media processing device coupled to a first buffer, the first media processing device configured to perform a first processing task on a frame of video data, and a second media processing device coupled to a second buffer, the second media processing device configured to perform a second processing task on the processed frame of video data. The architecture allows the two devices to have asymmetric video processing capabilities. Thus, the first device may advantageously perform a first task, such as decoding, while the second device performs a second task, such as post processing, according to the respective capabilities of each device, thereby increasing processing efficiency relative to prior art systems. Further, one driver may be used for both devices, enabling applications to take advantage of the system's accelerated processing capabilities without requiring code changes.

Abstract: One embodiment of a video processor includes a first media processing device coupled to a first memory and a second media processing device coupled to a second memory. The second media processing device is coupled to the first media processing device via a scalable bus. A software driver configures the media processing devices to provide video processing functionality. The scalable bus carries video data processed by the second media processing device to the first media processing device where the data is combined with video data processed by the first media processing device to produce a processed video frame. The first media processing device transmits the combined video data to a display device. Each media processing device is configured to process separate portions of the video data, thereby enabling the video processor to process video data more quickly than a single-GPU video processor.

Abstract: A system and method for decoding high definition video content using multiple processors reduces the likelihood of dropping video frames. Each of the multiple processors produces and stores a portion of a decoded video frame in its dedicated frame buffer. A region of a reference frame that is needed to produce a first portion of a decoded video frame, but that is not stored in the frame buffer coupled to the processor that will decode the first portion, is copied to the frame buffer. The size of the region needed may vary based on a maximum possible motion vector offset. The size of the region that is copied may be dynamic and based on a maximum motion vector offset for each particular reference frame.

Abstract: Systems and methods for balancing a load among multiple graphics processors that render different portions of a frame. A display area is partitioned into portions for each of two (or more) graphics processors. The graphics processors render their respective portions of a frame and return feedback data indicating completion of the rendering. Based on the feedback data, an imbalance can be detected between respective loads of two of the graphics processors. In the event that an imbalance exists, the display area is re-partitioned to increase a size of the portion assigned to the less heavily loaded processor and to decrease a size of the portion assigned to the more heavily loaded processor.