Abstract: A programmable device for storing digital video lines, being of a type intended for use in TV sets with digital frame scan features whereby a video line is sample coded in a digital signal, comprises at least one pair of memories each adapted to contain the code of one video line, and a bank of registers connected in series to one another and to each of the memories, at least one of the registers being fed, at its input terminals, with the digital signal to parallel the samples to be input to the memories.

Abstract: The invention relates to a method for reducing noise of the pulsive type in digital video receiver sets. The method consists of picking up a noise-affected sample of a video signal and replacing it with a weighted average of samples located in the contour thereof; this allows the noise component to be fittered out with a lower load, in terms of circuit complexity, on the TV set.

Abstract: The digital filter includes a plurality of parallel adders, each whereof has a first input, a second input and an output; the parallel output of each adder is connected to the first input of the successive adder across a respective delay element. The second input of each adder is connected in parallel to the output of one of a plurality of memory banks, each whereof comprises a plurality of addressable memory cells, the addressing inputs whereof can be driven by a sampled digital signal to be filtered, and the memory cells of each bank contain a digital value which is equal to the product of a preset coefficient by the address of the cell itself.

Abstract: The filter includes an arithmetical chain of parallel adders alternated with delay elements, and a memory constituted by lines of one-bit cells. Each line is addressable by a decoder controlled by a digital signal to be filtered; each line of memory contains side by side values which correspond to the partial products of successive impulse-response coefficients for a value equal to the line address. The memory additionally includes a number of read amplifiers. The number of read amplifiers is equal to the number of cells of one line in order to read the bits of the addressed. The outputs of the amplifiers are connected to respective parallel inputs of the adders of the arithmetical chain. Each memory line contains these values in two's-complement binary form in words which decrease in length by one bit for each increment of 2 in the characteristic of the coefficients, starting from the one of lowest characteristic.

Abstract: The filter includes an arithmetical chain of parallel adders alternated with delay elements, and a memory constituted by lines of one-bit cells. Each line is addressable by a decoder controlled by a digital signal to be filtered; each line of memory contains side by side values which correspond to the partial products of successive impulse-response coefficients for a value equal to the line address. The memory additionally includes a number of read amplifiers. The number of read amplifiers is equal to the number of cells of one line in order to read the bits of the addressed. The outputs of the amplifiers are connected to respective parallel inputs of the adders of the arithmetical chain. Each memory line contains these values in two's-complement binary form in words which decrease in length by one bit for each increment of 2 in the characteristic of the coefficients, starting from the one of lowest characteristic.

Abstract: A programmable device for storing digital video lines, being of a type intended for use in TV sets with digital frame scan features whereby a video line is sample coded in a digital signal, comprises at least one pair of memories each adapted to contain the code of one video line, and a bank of registers connected in series to one another and to each of the memories, at least one of the registers being fed, at its input terminals, with the digital signal to parallel the samples to be input to the memories.