Abstract: A DC-DC boost converter includes an inductor coupled between an input voltage and an input node, a first path coupled between the input node and a first output node at which a first output voltage is generated, and a second path coupled between the input node and a second output node at which a second output voltage is generated. The DC-DC boost converter operates in a first operating phase where the first path boosts the first output voltage and where the second path is kept from boosting the second output voltage by the second path being coupled to the first path, and operates in a second operating phase where the second path boosts the second output voltage and where the first path is kept from boosting the first output voltage by the second path not being coupled to the first path.

Abstract: A charge recovery driver is for a pair of loads, and includes first and second output nodes coupled to a pair of loads. During an initial phase, the first output node is grounded and the second output node is tied to the supply voltage. During a first phase, the first output node is coupled to the first tank capacitor and the second output node is coupled to the second tank capacitor. During a second phase, the first and second output nodes are coupled to one another. During a third phase, the second output node is coupled to the first tank capacitor and the first output node is coupled to the second tank capacitor. During a fourth phase, the first output node is coupled to the supply voltage and the second output node is coupled to ground. The third, second, and first phases are then repeated in that order.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: A connection system of the multiplex type between at least one master processing unit and slave units, in particular associated with electrical devices in a vehicle for activating or controlling at least one electrically functioning component in the corresponding device, the slave units being connected in groups to the master unit by means of corresponding communication channels common to the units of each group, and in which the master unit includes logical means for controlling the exchange of communications between the various channels; in particular these logical means include a microprocessor and control corresponding first blocks enabling transmission on such communication channels and corresponding second blocks enabling communication between the abovementioned channels.

Abstract: The additional voltage drop across a guard diode against supply polarity inversion in an integrated bridge circuit for driving an external load and employing two high-side NPN power switches driven by two PNP transistors, all monolithically integrated using a junction-type isolation technique, is substantially eliminated by connecting the emitters of the two PNP drive transistors directly to the positive rail, i.e. to the anode of the guard diode. Integrated PNP transistors are per se intrinsically protected against polarity inversion and when so connected permit to reduce the overall voltage drop across the driving bridge circuit. Using a Zener diode as the guard diode and a second Zener diode connected in opposition to the first Zener between the cathode thereof and the negative supply rail an additional spike protection of the circuit's components is implemented.

Abstract: The additional voltage drop across a guard diode against supply polarity inversion in an integrated bridge circuit for driving an external load and employing two high-side NPN power switches driven by two PNP transistors, all monolithically integrated using a junction-type isolation technique, is substantially eliminated by connecting the emitters of the two PNP drive transistors directly to the positive rail, i.e. to the anode of the guard diode. Integrated PNP transistors are per se intrinsically protected against polarity inversion and when so connected permit to reduce the overall voltage drop across the driving bridge circuit. Using a Zener diode as the guard diode and a second Zener diode connected in opposition to the first Zener between the cathode thereof and the negative supply rail an additional spike protection of the circuit's components is implemented.