Patents by Inventor Franco N. Sechi

Franco N. Sechi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5023994
    Abstract: A method of forming a microwave integrated circuit substrate which includes via holes connecting the upper and lower surfaces of the substrate in which the upper end of the via hole is closed by a conductive membrane.
    Type: Grant
    Filed: September 29, 1988
    Date of Patent: June 18, 1991
    Assignee: Microwave Power, Inc.
    Inventors: Marina Bujatti, Franco N. Sechi
  • Patent number: 4925723
    Abstract: The present invention is directed to a microwave integrated circuit formed on a substrate having via holes for either electrical grounding or heat dissipation or both and more particularly to a substrate including via holes which are filled with metal.
    Type: Grant
    Filed: September 29, 1988
    Date of Patent: May 15, 1990
    Assignee: Microwave Power, Inc.
    Inventors: Marina Bujatti, Franco N. Sechi
  • Patent number: 4732838
    Abstract: Patterned glass layers which are defect-free and have smooth surfaces are formed by a method wherein a mixture of glass frit and a photoresist composition is applied to the surface of the substrate; the layer is photolithographically patterned by exposing and developing predetermined areas of the layer; then after development and prior to firing of the glass frit, the layer of material is subjected to treatment with a suitable plasma at a temperature below the thermal decomposition temperature of the photoresist composition to remove the photoresist composition from the portion of the resist layer remaining on the substrate; and then the remainder of the layer, consisting essentially of glass frit, is fired to form a smooth, defect-free, patterned glass layer over the surface of the substrate.
    Type: Grant
    Filed: February 11, 1987
    Date of Patent: March 22, 1988
    Assignee: General Electric Company
    Inventors: Franco N. Sechi, Paul F. Pelka, Katherine E. Pinkerton
  • Patent number: 4697159
    Abstract: A tuning capacitor arrangement for a microwave circuit including, on a substrate, first and second conductors to be capacitively joined. The tuning capacitor arrangement includes first and second capacitors each having connective tabs terminating on the substrate in the space between the first and second conductors. One or more connective pieces electrically connect one or more tabs to the conductors to determine the total capacitance between the first and second conductors.
    Type: Grant
    Filed: October 31, 1984
    Date of Patent: September 29, 1987
    Assignee: RCA Corporation
    Inventors: Franco N. Sechi, David Kalokitis
  • Patent number: 4623556
    Abstract: A method is disclosed for forming a continuous glass coating which is free of pinholes, cracks, and the like over the surface of an electrical device. In the method disclosed, a mixture consisting essentially of an organic vehicle which is reactive with a suitable plasma to form gaseous reaction products at a temperature below the thermal decomposition temperature of the organic vehicle and a glass frit having a glass transition temperature above the thermal degradation temperature is applied in a layer over the surface of a completed electrical device. The applied layer of the mixture is then subjected to a suitable plasma at a temperature below the thermal degradation temperature of the organic vehicle for a time sufficient to remove the organic vehicle from the layer. The layer is then heated to or above the glass transition temperature of the glass frit until the glass frit fuses and forms a continuous defect-free glass coating over the surface of the electrical device.
    Type: Grant
    Filed: December 31, 1985
    Date of Patent: November 18, 1986
    Assignee: RCA Corporation
    Inventors: Richard Brown, Franco N. Sechi
  • Patent number: 4619836
    Abstract: A method is disclosed for fabricating thick film electrical components which are exceptionally uniform in electrical properties and have increased density wherein a thick film ink comprised of (i) an organic vehicle which is reactive with a plasma to form gaseous reaction products at a temperature below its thermal decomposition temperature, (ii) a glass frit having a glass transition temperature above the thermal degradation temperature, and (iii) a particulate material having the desired electrical properties for the thick film electrical component are applied to a suitable substrate in a pattern corresponding to the electrical component. The applied layer is then subjected to a suitable plasma at a temperature below the thermal degradation temperature for a time sufficient to remove the organic vehicle from the applied layer. The resultant layer is then heated at or above the glass transition temperature of the glass frit until the glass frit fuses and forms a composite with the particulate material.
    Type: Grant
    Filed: December 31, 1985
    Date of Patent: October 28, 1986
    Assignee: RCA Corporation
    Inventors: Ashok N. Prabhu, Edward J. Conlon, Franco N. Sechi
  • Patent number: 4465980
    Abstract: A predistortion circuit for a radio frequency power amplifier which has gain and phase shift characteristics that are non-linear as a function of power level of an RF input signal. The circuit includes a dual gate FET, with a drain coupled to the power amplifier. A modulated RF input signal is applied to an inductive matching network which is coupled to the signal gate of the FET. A modulating envelope detected version of the input signal is applied to a video amplifier which is coupled to the FET control gate. The signal applied to the control gate varies the gain of the FET as a function of input signal to compensate for the non-linear gain characteristic of the power amplifier and in conjunction with the matching network causes a phase change of the signal through the predistortion circuit to compensate for the non-linear phase characteristic of the power amplifier.
    Type: Grant
    Filed: September 23, 1982
    Date of Patent: August 14, 1984
    Assignee: RCA Corporation
    Inventors: Ho-Chung Huang, Mahesh Kumar, Franco N. Sechi
  • Patent number: 4409557
    Abstract: An amplifier including an in phase feedback signal to therefore exhibit negative resistance is receptive of an input alternating signal which includes a frequency F. The output of the amplifier is coupled to a resonator adjusted to a center frequency F and having undesirable resistance which is offset by the negative resistance of the amplifier. The resonator includes an inductor and adjustable capacitor arranged either in series or in parallel with the amplifier to therefore change the value of F.
    Type: Grant
    Filed: April 23, 1981
    Date of Patent: October 11, 1983
    Assignee: RCA Corporation
    Inventor: Franco N. Sechi
  • Patent number: 4376287
    Abstract: A microwave power circuit includes a thermally conductive, electrically insulating substrate such as beryllium oxide which has a relatively rough surface, a layer of dielectric material such as glass on a portion of the rough surface which layer has a relatively smooth surface, a conductive material on the relatively smooth surface, and a heat dissipating amplifying device having at least two terminals, one of which is connected to the conductive material and one of which is thermally connected to the substrate in a manner to pass heat thereto.
    Type: Grant
    Filed: October 29, 1980
    Date of Patent: March 8, 1983
    Assignee: RCA Corporation
    Inventor: Franco N. Sechi
  • Patent number: 4246535
    Abstract: A method of designing a linear rf amplifier comprising an output load impedance and an active device including the steps of (a) applying DC bias to the device, (b) applying two different frequency signals of an amplitude C, and (c) changing the value of the load impedance and recording the impedance value and associated C/I ratio for each impedance value (C/I being the ratio of amplitude C and amplitude I--the amplitude of an intermodulation product frequency). The last step (c) is repeated for a plurality of output levels. The above is repeated for a plurality of input power levels. The next step is selecting from the recorded information the impedance values corresponding to the maximum C/I ratio and recording the impedance values and corresponding C/I ratios, input power levels and output power levels. Then, choosing a desired C/I ratio from those recorded in the previous step and selecting the impedance value corresponding to the maximum output power level.
    Type: Grant
    Filed: July 6, 1979
    Date of Patent: January 20, 1981
    Assignee: RCA Corporation
    Inventors: Ho-Chung Huang, Franco N. Sechi
  • Patent number: 4189688
    Abstract: First and second field effect transistors (FETs) each have a gallium arsenide substrate with an N-type active region that carries first and second electrodes in ohmic contact therewith and a gate electrode. The FETs are mounted in a flip-chip carrier that connects the first electrodes to ground. The FETs are biased to cause a current to flow from the first to second electrodes, whereby the first and second electrodes serve as drains and sources, respectively, of the FETs. The gate of the first FET is connected to a resonator. Additionally, a matching network connects the source of the first FET to the gate of the second FET. The matching network and the biasing of the first FET cause the gate input impedance thereof to be of a negative value that compensates for losses in the resonator. A load connected to the source of the second FET and the bias voltage cause the second FET to have a gate input impedance of a negative value that causes oscillation.
    Type: Grant
    Filed: July 24, 1978
    Date of Patent: February 19, 1980
    Assignee: RCA Corporation
    Inventors: Franco N. Sechi, Raymond L. Camisa
  • Patent number: 4189682
    Abstract: A field effect transistor (FET) is comprised of a plurality of unit transistors having a common gallium arsenide substrate with an N-type active region. Each unit transistor is comprised of a unit gate, a unit drain and a unit source. The FET is mounted in a flip-chip carrier that connects all of the unit sources together to form a first electrode of the FET. Additionally, the first electrode is connected to ground by the carrier. All of the unit drains are connected together on the substrate to form a second electrode of the FET. The FET is reverse biased to cause a current to flow from the first electrode to the second electrode, whereby the first and second electrodes are a drain and a source, respectively, of the FET.
    Type: Grant
    Filed: July 24, 1978
    Date of Patent: February 19, 1980
    Assignee: RCA Corporation
    Inventor: Franco N. Sechi
  • Patent number: 4124823
    Abstract: A first group of electrically conductive sheets are mounted within a first rectangular waveguide that is connected to a signal power source. A second group of electrically conductive sheets are mounted within a second rectangular waveguide that is connected to a load. The sheets divide corresponding parts of the first and second waveguides into first and second pluralities of smaller waveguides, respectively. Each one of the first smaller waveguides is coupled to an associated one of a plurality of amplifiers at the input thereof. Each one of the second smaller waveguides is coupled to an associated one of the amplifiers at the output thereof. The first smaller waveguides cause power from the signal source to be divided into parts that are amplified by the amplifiers. The second smaller waveguides couple energy from the amplifiers to the load via the second waveguide whereby the amplified power is combined and provided to the load.
    Type: Grant
    Filed: November 8, 1976
    Date of Patent: November 7, 1978
    Assignee: RCA Corporation
    Inventor: Franco N. Sechi