Abstract: The present invention is a novel method whereby voids or solid opens at the bottom of via can be avoided without drastically altering the resistivity or parasitic capacitances of the whole metal interconnect system. The invention includes in one embodiment a process of forming interconnects and vias in a microelectronic circuit structure. This process includes implanting and/or alloying an impurity element in the local area of the top surface of a metal interconnect at the bottom of a via. Doping may be done before or after formation of the via. After the via is formed, it is filled with a metal such as copper. Another embodiment of the invention is a microelectronic circuit structure manufactured by the aforementioned method.

Abstract: A method for fabricating a transistor on a semiconductor substrate includes varying a polysilicon doping level near a first and second edge of a diffusion region with a polysilicon doping level of a center region of a polysilicon region.

Abstract: The present invention includes an advanced MOSFET design and manufacturing approach that allow further increase in IC packing density by appropriately addressing the increased leakage problems associated with it. The MOSFET according to one embodiment of the present invention includes a gate, source/drain diffusion regions on opposite sides of the gate, and source/drain extensions adjacent the source/drain diffusion regions. The MOSFET also includes at least one added corner diffusion region that overlaps with at least a portion of a source/drain extension region for reducing off-state leakage currents. The corner diffusions can be created using conventional CMOS IC fabrication processes with some modification of an ion implant mask used in manufacturing a conventional CMOS IC.

Abstract: The present invention includes an advanced MOSFET design and manufacturing approach that allow further increase in IC packing density by appropriately addressing the increased leakage problems associated with it. The MOSFET according to one embodiment of the present invention includes a gate, source/drain diffusion regions on opposite sides of the gate, and source/drain extensions adjacent the source/drain diffusion regions. The MOSFET also includes at least one added corner diffusion region that overlaps with at least a portion of a source/drain extension region for reducing off-state leakage currents. The corner diffusions can be created using conventional CMOS IC fabrication processes with some modification of an ion implant mask used in manufacturing a conventional CMOS IC.

Abstract: A method for fabricating a transistor on a semiconductor substrate includes varying a polysilicon doping level near a first and second edge of a diffusion region with a polysilicon doping level of a center region of a polysilicon region.

Abstract: A capacitive electrode structure for use in an integrated circuit fabricated on a substrate comprises a first electrode formed by a diffusion region in the substrate, an insulating layer formed on the diffusion region, and a second electrode formed by a conductive layer deposited on said insulating layer. To increase the capacitance per chip area of the capacitive electrode structure, a plurality of recesses are formed in the first electrode on an upper surface thereof with a lower surface of the second electrode substantially following a contour of these recesses. In one embodiment, the capacitive electrode structure is employed for a capacitor formed between a control gate and a floating gate in an EEPROM cell. Capacitors in other types of integrated circuit can be likewise formed using the electrode structure of the present invention.

Abstract: A method of fabricating transistors on a semiconductor substrate is disclosed according to a first embodiment of the present invention. Gate dielectrics of equal thickness are provided to a first and second transistor on the semiconductor substrate. A polysilicon doping level of the first transistor is varied with a polysilicon doping level of the second transistor.

Abstract: A method of fabricating transistors on a semiconductor substrate is disclosed according to a first embodiment of the present invention. Gate dielectrics of equal thickness are provided to a first and second transistor on the semiconductor substrate. A polysilicon doping level of the first transistor is varied with a polysilicon doping level of the second transistor.

Abstract: Pad structures for an integrated circuit are provided that use via holes or slots rather than large pad openings to form electrical connections between successive metal interconnection layers. The via holes or slots are filled using standard metal etchback deposition techniques. The pad structures minimize particle generation during circuit fabrication. A number of the via holes or slots in the pad structure can be interconnected in parallel to provide a sufficient current handling capacity to distribute power to the active components on the integrated circuit.

Abstract: A bottle for liquids is fitted with a dropper adaptor including a plastic body having extending longitudinally therethrough a flow channel. Over at least a first length portion thereof the flow channel has a cross section in the shape of a star with at least three branches. The channel opens outwardly from the body only at an outlet aperture at an outlet end of the flow channel and at an inlet aperture, defined by plural windows, at an internal end of the flow channel.

Abstract: Process for making transparent hollow bodies of terephthalate of polyethyleneglycol in which a preform is made, the preform is cooled rapidly to a temperature at least equal to the crystallization temperature, and is then rapidly expanded to obtain bi-orientation and solidification prior to substantial crystallization of the material. The preform can also be axially stretched during the operation. The apparatus for preforming the process includes a rotatable turret with mandrels, which operates to slightly expand the material on a mandrel.

Abstract: Hollow articles are made from a cylindrical preform by first elongating the preform to reduce its diameter and then blowing the elongated preform in a blow mold to produce the completed article, which is thus biaxially oriented.

Abstract: The invention relates to an apparatus for detecting the injection into an internal combustion engine, and in particular a diesel engine, comprising an injection pump, by means of an injector and at least one length of connecting tubing between the pump and the injector, this apparatus comprising means for detecting the transverse deformation of the connecting tubing under the pressure of the injected fuel.The detection means are disposed between gripper means for firmly locking the connecting tubing at two non-contiguous zones, and are carried by these gripper means in such a way that the sensitive parts of the detection means are applied, in the operative position of the apparatus, at least to the central part of the tubing between these two zones.