Patents by Inventor Francois J.R. Clement

Francois J.R. Clement has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus for modeling IC substrate noise
    Patent number: 6725185
    Abstract: Methods and apparatus for modeling noise present in an integrated circuit substrate are disclosed. A position on a surface of the integrated circuit substrate is obtained. A combination of layers associated with the position and defining a vertical column beneath the position is ascertained. A doping profile associated with the combination of layers is obtained. The doping profile includes a plurality of portions, each of which is associated with a different range of substrate depth. Noise in the integrated circuit substrate is then modeled using the obtained doping profile.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: April 20, 2004
    Assignee: Cadence Design Systems, Inc.
    Inventor: Francois J. R. Clèment
  • IC substrate noise modeling with improved surface gridding technique
    Patent number: 6438733
    Abstract: Methods and apparatus for performing surface modeling of a substrate for the purpose of characterizing the substrate, which includes initially dividing said substrate surface into a plurality of local partitions and thereafter forming divisions from said plurality of local partitions. The technique includes positioning a first component at a first location on said substrate surface, thereby creating additional divisions within one of said plurality of local partitions. The method further includes promoting said one of said plurality of local partitions to a global partition and forming local partitions within said one of said plurality of local partitions if a number of divisions within said one of said plurality of local partitions exceeds a predefined value.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: August 20, 2002
    Assignee: Simplex Solutions, Inc.
    Inventor: François J. R. Clèment
  • Apparatus for modeling IC substrate noise
    Publication number: 20010041428
    Abstract: Methods and apparatus for modeling noise present in an integrated circuit substrate are disclosed. A position on a surface of the integrated circuit substrate is obtained. A combination of layers associated with the position and defining a vertical column beneath the position is ascertained. A doping profile associated with the combination of layers is obtained. The doping profile includes a plurality of portions, each of which is associated with a different range of substrate depth. Noise in the integrated circuit substrate is then modeled using the obtained doping profile.
    Type: Application
    Filed: July 11, 2001
    Publication date: November 15, 2001
    Applicant: Snaketech, Inc.
    Inventor: Francois J.R. Clement
  • Method for modeling noises in an integrated circuit
    Patent number: 6291322
    Abstract: Methods and apparatus for modeling noise present in an integrated circuit substrate are disclosed. A position on a surface of the integrated circuit substrate is obtained. A combination of layers associated with the position and defining a vertical column beneath the position is ascertained. A doping profile associated with the combination of layers is obtained. The doping profile includes a plurality of portions, each of which is associated with a different range of substrate depth. Noise in the integrated circuit substrate is then modeled using the obtained doping profile.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: September 18, 2001
    Assignee: Snaketech, Inc.
    Inventor: François J. R. Clèment