Abstract: The disclosure pertains to parallel analog-digital converters, the first comparator stage of which give a so-called thermometer scale, formed by a sequence of logic "ones" and logic "zeros". According to the disclosure, a corrector stage is added on in series with the comparator stage. If a comparator of the first stage accidentally gives a logic value opposite that given by the two neighboring comparators, the corrector stages forces the accidentally erroneous value to assume the same value as that the values given by the two neighboring comparators, if and only if these values are equal. The disclosed device can be applied to signal processing ADCs.