Patents by Inventor Francois Vidal

Francois Vidal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240394450
    Abstract: A method includes: receiving an integrated circuit design including a plurality of circuit modules; partitioning the integrated circuit design into a plurality of partitions in accordance with the plurality of circuit modules; assigning the plurality of partitions of the integrated circuit design to corresponding portions of an emulation system; inserting, by a processor, a plurality of emulation communication circuit structures into the plurality of circuit modules of the integrated circuit design, the corresponding portions of the emulation system being configured to communicate via one or more emulation interconnects connected to the emulation communication circuit structures, the emulation communication circuit structures being represented at a representation level selected from a group comprising: a packet level; a transaction level; and a protocol level; and emulating operation of the integrated circuit design using the emulation system.
    Type: Application
    Filed: October 24, 2023
    Publication date: November 28, 2024
    Inventors: Cedric Jean Alquier, Jean-Philippe Colrat, Luc François Vidal, Mikhail Bershteyn
  • Publication number: 20240173627
    Abstract: A non-transitory storage medium encoded with a computer readable game program executed by a computer of an information processing apparatus, at least one computer being configured to perform operations including causing an emulator to execute a game program, monitoring a prescribed address in a memory area used as a result of execution of the game program by the emulator, the prescribed address changing in value on the occurrence of a prescribed event in a game, determining a status of accomplishment of an objective set in advance based on transition of the value at the prescribed address in the game, transmitting the status of accomplishment of the objective to a server provided to communicate over a network, and receiving from the server, information on a status of accomplishment of an online mission, the status being determined based on the status of accomplishment of the objective transmitted by a plurality of players.
    Type: Application
    Filed: June 14, 2023
    Publication date: May 30, 2024
    Inventors: Naoya MORIMURA, Jean-Francois VIDAL, Laurent HIRIART
  • Patent number: 11775716
    Abstract: A method of capturing signals during hardware verification of a circuit design utilizes at least one field-programmable gate array (FPGA) and includes selecting, at run time and using one or more pre-compiled macros, a group of signals to be captured during verification of the circuit design and storing values of the group of signals in at least first and second random access memories disposed in the at least one FPGA. The first and second random access memories may be addressable spaces of the same random access memory.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: October 3, 2023
    Assignee: Synopsys, Inc.
    Inventors: Arturo Salz, Ching-Ping Chou, Jean-Philippe Colrat, Sébastien Roger Delerse, Luc Francois Vidal, Arnold Mbotchak
  • Publication number: 20210150110
    Abstract: A method of capturing signals during hardware verification of a circuit design utilizes at least one field-programmable gate array (FPGA) and includes selecting, at run time and using one or more pre-compiled macros, a group of signals to be captured during verification of the circuit design and storing values of the group of signals in at least first and second random access memories disposed in the at least one FPGA. The first and second random access memories may be addressable spaces of the same random access memory.
    Type: Application
    Filed: January 28, 2021
    Publication date: May 20, 2021
    Inventors: Arturo SALZ, Ching-Ping Chou, Jean-Philippe Colrat, Sebastien Roger Delerse, Luc Francois Vidal, Arnold Mbotchak
  • Patent number: 10949588
    Abstract: A method of capturing signals during hardware verification of a circuit design utilizes at least one field-programmable gate array (FPGA) and includes selecting, at run time and using one or more pre-compiled macros, a group of signals to be captured during verification of the circuit design and storing values of the group of signals in at least first and second random access memories disposed in the at least one FPGA. The first and second random access memories may be addressable spaces of the same random access memory.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: March 16, 2021
    Assignee: SYNOPSYS, INC.
    Inventors: Arturo Salz, Ching-Ping Chou, Jean-Philippe Colrat, Sébastien Roger Delerse, Luc François Vidal, Arnold Mbotchak
  • Patent number: 10870054
    Abstract: A non-transitory storage medium encoded with a game program executed by a computer of a game device connected to a display according to one aspect, the game program causing the computer to perform game processing for performing processing of a game, operation acceptance processing for accepting an operation onto the game, operation information recording processing for recording for a predetermined period, operation information accepted in the operation acceptance processing in the processing of the game, game replay processing for replaying a status of play of a game on the display based on the operation information recorded in the operation information recording processing, and game resumption processing for resuming the processing of the game from any position during replay in the game replay processing.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: December 22, 2020
    Assignee: NINTENDO CO., LTD.
    Inventors: Takao Shimizu, Tomoyoshi Yamane, Pacôme Danhiez, Yann Benigot, Jean-Francois Vidal, Emeric Pascual, Yacine Belkadi, Laurent Hiriart
  • Publication number: 20190022529
    Abstract: A non-transitory storage medium encoded with a game program executed by a computer of a game device connected to a display according to one aspect, the game program causing the computer to perform game processing for performing processing of a game, operation acceptance processing for accepting an operation onto the game, operation information recording processing for recording for a predetermined period, operation information accepted in the operation acceptance processing in the processing of the game, game replay processing for replaying a status of play of a game on the display based on the operation information recorded in the operation information recording processing, and game resumption processing for resuming the processing of the game from any position during replay in the game replay processing.
    Type: Application
    Filed: December 19, 2017
    Publication date: January 24, 2019
    Inventors: Takao SHIMIZU, Tomoyoshi YAMANE, Pacôme DANHIEZ, Yann BENIGOT, Jean-Francois VIDAL, Emeric PASCUAL, Yacine BELKADI, Laurent HIRIART
  • Publication number: 20060143037
    Abstract: The system for taking over and operating services and installations at a site comprise portable means for collecting data at the site and a central unit comprising a module for analyzing the services and technical installations of the site, a computer-assisted maintenance manager module, and a module for following up and optimizing operation and maintenance of the site, said module analyzing maintenance and breakdowns in order to modify the classification of the corresponding equipment in the analysis module and in order to modify the corresponding maintenance schedules in the maintenance manager module.
    Type: Application
    Filed: June 16, 2005
    Publication date: June 29, 2006
    Inventors: Serge Artiguenave, Yanick Bertrand, Luc Chilou, Philippe Manguine, Francois Vidal