Patents by Inventor Frank A. Ludwig

Frank A. Ludwig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11774438
    Abstract: The disclosure provides a measurement set-up for a return cement suspension, a construction site arrangement with a measurement set-up, and a method which can be carried out inexpensively, reliably, and easily.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: October 3, 2023
    Assignee: KELLER HOLDING GMBH
    Inventors: Uwe Hinzmann, Christian Thienert, Christoph Klaproth, Frank Ludwig, Reiner Otterbein
  • Publication number: 20210148883
    Abstract: The disclosure provides a measurement set-up for a return cement suspension, a construction site arrangement with a measurement set-up, and a method which can be carried out inexpensively, reliably, and easily.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 20, 2021
    Inventors: Uwe Hinzmann, Christian Thienert, Christoph Klaproth, Frank Ludwig, Reiner Otterbein
  • Patent number: 9894325
    Abstract: A system and method to capture a plurality of images and store the captured images. The system has multiple camera systems capable of transmitting image data. At least one camera system is equipped with an apparatus for determining location coordinates such as GPS. A computer system monitors location coordinates, retrieves image data from the camera systems, and stores the image data into a file. A contiguous array of location coordinates is entered and the computer system locates camera systems within the contiguous array of location coordinates; retrieves image data from the located camera systems; and files the image data taken from each of the camera systems to obtain a file of image data. The system provides the ability to serially interleave frames or video captured from multiple sources.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: February 13, 2018
    Assignee: AT&T Intellectual Property II, L.P.
    Inventors: Frank Ludwig Rauscher, Carl E. Werner
  • Patent number: 9662686
    Abstract: A device and method for treating the surface of a semiconductor wafer provides a treatment fluid in the form of a dispersion of gas bubbles in a treatment liquid generated at acoustic pressures less than those required to induce cavitation in the treatment liquid. A resonator supplies ultrasonic or megasonic energy to the treatment fluid and is configured to create an interference pattern in the treatment fluid comprising regions of pressure amplitude minima and maxima at an interface of the treatment fluid and the semiconductor wafer.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 30, 2017
    Assignee: LAM RESEARCH AG
    Inventors: Frank Ludwig Holsteyns, Alexander Lippert
  • Patent number: 9472124
    Abstract: The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a security layer (10, 110, 210) that can be stuck on the individual packaging. Removable elements (16, 216) are formed in the security layer (10, 110, 210), in the region of the medicaments (15) to be inserted, in such a way that cuts (17) are made in the security layer (10, 110, 210), on the edge of the removable elements (16, 216), said cuts (17) following a virtual cut strip. In order to produce such a security label that can be easily opened, but still provides protection against unauthorized opening by children or inadvertent opening, and can be produced cost-effectively, obstacle points are provided on the cut strip, forming a resistance when the removal element is removed.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: October 18, 2016
    Assignee: FAUBEL & CO NACHFOLGER GMBH
    Inventors: Frank Ludwig, Reinhard Kuge, Marco Dieling
  • Patent number: 9374915
    Abstract: The invention relates to a backplane configuration for use in an electronic crate system, said backplane configuration comprising a first-type backplane and a second-type backplane; wherein the first-type backplane is coupled to the second-type backplane by mechanical connection means; wherein the first-type backplane and the second-type backplane are spatially separated from each other by a distance which is sufficient such that electromagnetic interferences between the first-type backplane and the second-type backplane are eliminated or at least minimized; and wherein the first-type backplane is adapted to be electrically coupled with at least one first-type module, and the second-type backplane is adapted to be electrically coupled with at least one second-type module.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: June 21, 2016
    Assignees: Warsaw University of Technology Institute of Electronic Systems, Deutsches Elektronen-Synchrotron DESY
    Inventors: Krzysztof Czuba, Tomasz Jezynski, Frank Ludwig, Holger Schlarb
  • Patent number: 9044794
    Abstract: A cleaning fluid including dispersed gas avoids using ultrasonic energy to induce cavitation by subjecting a liquid containing dissolved gas to a pressure reduction in a bubble machine, to generate a gas/liquid dispersion. The cleaning fluid can be used to clean articles such as semiconductor wafers using a device that includes a holder and a vibrator for supplying ultrasonic or megasonic energy to the article.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: June 2, 2015
    Assignee: LAM Research AG
    Inventors: Frank Ludwig Holsteyns, Alexander Lippert, Thomas Wirnsberger
  • Publication number: 20150097962
    Abstract: A system and method to capture a plurality of images and store the captured images. The system has multiple camera systems capable of transmitting image data. At least one camera system is equipped with an apparatus for determining location coordinates such as GPS. A computer system monitors location coordinates, retrieves image data from the camera systems, and stores the image data into a file. A contiguous array of location coordinates is entered and the computer system locates camera systems within the contiguous array of location coordinates; retrieves image data from the located camera systems; and files the image data taken from each of the camera systems to obtain a file of image data. The system provides the ability to serially interleave frames or video captured from multiple sources.
    Type: Application
    Filed: December 12, 2014
    Publication date: April 9, 2015
    Inventors: Frank Ludwig Rauscher, Carl E. Werner
  • Patent number: 8978890
    Abstract: The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a base layer (11, 111, 211) that can be stuck to the individual packaging (10, 110), at least one opening cut (26, 226) being formed in the base layer (11, 111, 211), in the region of the medicament (16). A security layer (10, 110) is stuck to the base layer (11, 111, 211), and removable elements (19) are formed in the security layer (10, 11) in the region of the medicaments (16), in such a way that cuts (18) are made in the security layer (10, 110) on the edge of the removable elements (19), said cuts (18) following a virtual cut strip. Furthermore, a release material which reduces or eliminates the adhesive force of the adhesive of the security layer (10, 110) is applied to the base layer (11, 111, 211) in the region of the removable elements (19).
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: March 17, 2015
    Assignee: Faubel & Co Nachfolger GmbH
    Inventors: Frank Ludwig, Reinhard Kuge, Marco Dieling
  • Patent number: 8865283
    Abstract: The present invention relates to a security label for securing medications retained in an individual packaging, comprising a base layer (10, 20, 30) that can be adhesively bonded to the individual packaging (12, 22, 32), wherein at least one opening cut (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) per medication (16) is provided in the base layer (10, 20, 30) in the area of the expected medications (16), wherein the opening cut (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) has at least one first and one second partial cut, and wherein the first partial cut and the second partial cut meet or cross, wherein two, three, four, or five opening cuts (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) are provided in the area of the expected medication (16), and the opening cuts (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157); are arranged exclusively along a segment of the contour of the medication (16) or along a segment of the contour of the medication
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: October 21, 2014
    Assignee: Faubel & Co Nachfolger GmbH
    Inventors: Frank Ludwig, Reinhard Kuge, Marco Dieling
  • Patent number: 8853051
    Abstract: Generally, the present disclosure is directed to various methods of recessing an active region and an adjacent isolation structure in a common etch process. One illustrative method disclosed includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active area in the substrate, forming a patterned masking layer above the substrate, wherein the patterned masking layer exposes the active area and at least a portion of the isolation structure for further processing, and performing a non-selective dry etching process on the exposed active area and the exposed portion of the isolation structure to define a recess in the substrate and to remove at least some of the exposed portions of the isolation structure.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: October 7, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Frank Jakubowski, Jorg Radecker, Frank Ludwig
  • Patent number: 8679940
    Abstract: Methods for fabricating semiconductor devices are provided. In an embodiment, a method for fabricating a semiconductor device includes forming a planarization stop layer overlying a semiconductor substrate. A trench is etched through the planarization stop layer and into the semiconductor substrate and is filled with an isolation material. The isolation material is planarized to establish a top surface of the isolation material coplanar with the planarization stop layer. In the method, a dry deglaze process is performed to remove a portion of the planarization stop layer and a portion of the isolation material to lower the top surface of the isolation material to a desired stepheight above the semiconductor substrate.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: March 25, 2014
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Frank Jakubowski, Jörg Radecker, Frank Ludwig
  • Patent number: 8652889
    Abstract: When forming sophisticated semiconductor devices, three-dimensional transistors in combination with planar transistors may be formed on the basis of a replacement gate approach and self-aligned contact elements by forming the semiconductor fins in an early manufacturing stage, i.e., upon forming shallow trench isolations, wherein the final electrically effective height of the semiconductor fins may be adjusted after the provision of self-aligned contact elements and during the replacement gate approach.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: February 18, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Andy Wei, Peter Baars, Richard Carter, Frank Ludwig
  • Publication number: 20130329392
    Abstract: The invention relates to a backplane configuration for use in an electronic crate system, said backplane configuration comprising a first-type backplane and a second-type backplane; wherein the first-type backplane is coupled to the second-type backplane by mechanical connection means; wherein the first-type backplane and the second-type backplane are spatially separated from each other by a distance which is sufficient such that electromagnetic interferences between the first-type backplane and the second-type backplane are eliminated or at least minimized; and wherein the first-type backplane is adapted to be electrically coupled with at least one first-type module, and the second-type backplane is adapted to be electrically coupled with at least one second-type module.
    Type: Application
    Filed: June 10, 2013
    Publication date: December 12, 2013
    Inventors: Krzysztof Czuba, Tomasz Jezynski, Frank Ludwig, Holger Schlarb
  • Publication number: 20130273709
    Abstract: Generally, the present disclosure is directed to various methods of recessing an active region and an adjacent isolation structure in a common etch process. One illustrative method disclosed includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active area in the substrate, forming a patterned masking layer above the substrate, wherein the patterned masking layer exposes the active area and at least a portion of the isolation structure for further processing, and performing a non-selective dry etching process on the exposed active area and the exposed portion of the isolation structure to define a recess in the substrate and to remove at least some of the exposed portions of the isolation structure.
    Type: Application
    Filed: April 12, 2012
    Publication date: October 17, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Frank Jakubowski, Jorg Radecker, Frank Ludwig
  • Publication number: 20130217205
    Abstract: Methods for fabricating semiconductor devices are provided. In an embodiment, a method for fabricating a semiconductor device includes forming a planarization stop layer overlying a semiconductor substrate. A trench is etched through the planarization stop layer and into the semiconductor substrate and is filled with an isolation material. The isolation material is planarized to establish a top surface of the isolation material coplanar with the planarization stop layer. In the method, a dry deglaze process is performed to remove a portion of the planarization stop layer and a portion of the isolation material to lower the top surface of the isolation material to a desired stepheight above the semiconductor substrate.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: GLOBALFOUNDRIES Inc.
    Inventors: Frank Jakubowski, Jörg Radecker, Frank Ludwig
  • Publication number: 20120228185
    Abstract: The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a base layer (11, 111, 211) that can be stuck to the individual packaging (10, 110), at least one opening cut (26, 226) being formed in the base layer (11, 111, 211), in the region of the medicament (16) to be inserted. A security layer (10, 110) is stuck to the base layer (11, 111, 211), and removable elements (19) are formed in the security layer (10, 11) in the region of the medicaments (16) to be inserted, in such a way that cuts (18) are made in the security layer (10, 110) on the edge of the removable elements (19), said cuts (18) following a virtual cut strip. Furthermore, a means for reducing or eliminating the adhesive force of the adhesive of the security layer (10, 110) is applied to the base layer (11, 111, 211) in the region of the removable elements (19).
    Type: Application
    Filed: August 31, 2010
    Publication date: September 13, 2012
    Inventors: Frank Ludwig, Reinhard Kuge, Marco Dieling
  • Publication number: 20120211808
    Abstract: When forming sophisticated semiconductor devices, three-dimensional transistors in combination with planar transistors may be formed on the basis of a replacement gate approach and self-aligned contact elements by forming the semiconductor fins in an early manufacturing stage, i.e., upon forming shallow trench isolations, wherein the final electrically effective height of the semiconductor fins may be adjusted after the provision of self-aligned contact elements and during the replacement gate approach.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 23, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Andy Wei, Peter Baars, Richard Carter, Frank Ludwig
  • Patent number: 8242767
    Abstract: A method is disclosed for detecting changes in an interval of time (?T) between an optical or electrical signal and an optical or electrical reference signal using a photodetector. The method may be used to synchronize an optical or electrical signal with an optical or electrical reference signal. An apparatus for carrying out the method is also disclosed. The method comprises the steps of: receiving the optical signal and the optical reference signal by means of the photodetector, outputting an electrical response signal at an output of the photodetector, the electrical response signal having a frequency spectrum which depends on the interval of time (?T), filtering a selected harmonic from the frequency spectrum of the electrical response signal which has been output, and detecting changes in the interval of time (?T) from changes in the amplitude of the selected harmonic.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: August 14, 2012
    Assignee: Deutsches Elektronen-Snychrotron Desy
    Inventors: Florian Lohl, Johann Zemella, Holger Schlarb, Frank Ludwig, Axel Winter, Matthias Felber
  • Publication number: 20120193904
    Abstract: The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a security layer (10, 110, 210) that can be stuck on the individual packaging. Removable elements (16, 216) are formed in the security layer (10, 110, 210), in the region of the medicaments (15) to be inserted, in such a way that cuts (17) are made in the security layer (10, 110, 210), on the edge of the removable elements (16, 216), said cuts (17) following a virtual cut strip. In order to produce such a security label that can be easily opened, but still provides protection against unauthorised opening by children or inadvertent opening, and can be produced cost-effectively, obstacle points are provided on the cut strip, forming a resistance when the removal element is removed.
    Type: Application
    Filed: August 31, 2010
    Publication date: August 2, 2012
    Inventors: Frank Ludwig, Reinhard Kuge, Marco Dieling