Patents by Inventor Frank Binns

Frank Binns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030145194
    Abstract: A method of electing a bootstrap processor from among a plurality of processor includes creating an atomic access shared location and electing one of said processors as the bootstrap processor.
    Type: Application
    Filed: March 6, 2003
    Publication date: July 31, 2003
    Inventors: David J. O'Shea, Bruce C. Edmonds, Craig W. Keating, Larry D. Aaron, Frank E. LeClerg, Frank Binns
  • Publication number: 20030097602
    Abstract: A method and apparatus comprising setting a register to a value executing a processing instruction to interpret the value and the at least one register verifying that the interpretation of the processing instruction is valid to ensure the at least one register contains a valid at least one string scanning the string in the register for multiplier scanning the string in the register for a frequency and determining a maximum operating frequency with the multiplier and frequency.
    Type: Application
    Filed: November 16, 2001
    Publication date: May 22, 2003
    Inventors: Bryant E. Bigbee, Shivnandan Kaushik, Frank Binns
  • Publication number: 20020112151
    Abstract: Methods, apparatuses, and systems are provided to determine a bootstrap processor. In an embodiment, the method determines a bootstrap processor from a plurality of operable processors in a fault tolerant multiprocessor system irrespective of an initialization time of a particular operable processor.
    Type: Application
    Filed: February 14, 2001
    Publication date: August 15, 2002
    Inventors: David Lawrence Hill, Frank Binns
  • Publication number: 20020112145
    Abstract: A method and apparatus for providing software compatibility in a processor architecture. In one embodiment, a method involves accessing a control register mask and adjusting a control value for a control register as a function of the control register mask. The masked control value is programmed into the control register.
    Type: Application
    Filed: February 14, 2001
    Publication date: August 15, 2002
    Inventors: Bryant E. Bigbee, Frank Binns, Kaushik Shiv, Patrice Roussel
  • Patent number: 6349380
    Abstract: A microprocessor for providing an extended linear address of more than 32 bits. The extended linear address may be provided by concatenating a linear address with a segment selector extension, or by concatenating the values from two registers. Hierarchical translation of a linear address to a physical address is performed in which the number of levels in the hierarchy depends upon whether the linear address is an extended linear address.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: February 19, 2002
    Assignee: Intel Corporation
    Inventors: Shahrokh Shahidzadeh, Bryant E. Bigbee, David B. Papworth, Frank Binns, Robert P. Colwell
  • Publication number: 20010021217
    Abstract: An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.
    Type: Application
    Filed: February 14, 2001
    Publication date: September 13, 2001
    Inventors: Stephen H. Gunther, Frank Binns, Jack D. Pippin, Linda J. Rankin, Edward A. Burton, Douglas M. Carmean, John M. Bauer
  • Patent number: 5724527
    Abstract: A multiprocessor computing system includes a serial bus and implements a boot protocol in which each processor compares a vector field of a boot message issued on the serial bus by a first processor with an ID of the processor; a match indicating that the first processor is a bootstrap processor (BSP). The non-BSPs are halted and, after issuing a final message on the bus, the BSP fetches code to start a reset sequence. The BSP then sends a message to wake the non-BSPs, after which time the operating system software is given control. Faulty processors that fail to participate in the boot protocol do not stop the selection of a BSP as long as one processor in the system is functional.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: March 3, 1998
    Assignee: Intel Corporation
    Inventors: Milind Karnik, Joseph Batz, Keshavan Tiruvallur, Andrew Glew, Frank Binns, Shreekant Thakkar, Nitin Sarangdhar