Abstract: Methods and circuits are disclosed for measuring temperature and/or voltage using ring oscillators. In an example implementation, temperature and/or voltage are determined using an iterative measurements of a ring oscillator. The ring oscillator oscillates with a different voltage-temperature response in each of the first, second and third modes. In each iteration, a first set of indications of frequency are determined for a ring oscillator in a first mode, a second mode, and a third mode. A coarse temperature estimate and a coarse voltage estimate of the ring oscillator are determined based on the indications of frequency measured in a first iteration. A more accurate temperature estimate and a more accurate voltage estimate of the ring oscillator are determined as a function of a second set of indications of frequency measured in a second iteration, the coarse temperature estimate, and the coarse voltage estimate.

Abstract: Method and apparatus for providing secure programmable logic devices is described. One aspect of the invention relates to securing a programmable logic device having instruction register logic coupled to control logic via an instruction bus. A non-volatile memory is provided for storing at least one security bit for at least one instruction associated with the programmable logic device. Gating logic is provided in communication with the non-volatile memory and at least a portion of the instruction bus. The gating logic is configured to selectively gate decoded instructions transmitted from the instruction register logic towards the control logic based on state of the at least one security bit.

Abstract: The present invention relates generally to integrated circuit trays, and in particular, to an integrated circuit tray enabling communication with integrated circuit stored therein. A storage tray for storing integrated circuits according to one embodiment of the invention comprises a plurality of recesses adapted to receive an integrated circuit. A conductor extends between the plurality of recesses and comprises a plurality of contacts associated with the recesses. A terminal portion, such as a connector, is coupled to the conductor to enable programming the integrated circuits stored in the tray. Embodiments having additional components are also described. Further, embodiments for connecting a plurality of trays and enabling programming of integrated circuits in the plurality of trays are also described. A system for programming integrated circuits in a storage device is also described. Methods of communicating with a plurality of integrated circuits in a storage tray are also disclosed.

Abstract: Integrated circuits are disclosed that have interconnected programmable logic, and configuration memory. The interconnected programmable logic is connected by a logical interconnection network. The integrated circuits have a configurable function unit including a function unit component, such as a counter or shift register. The integrated circuits further include a configurable decoder, which decodes a value presented by the function unit component based on decoder configuration data. The integrated circuits also have at least one decoder output, which provides information about a comparison of the decoder configuration data with the value presented by the function unit component.

Abstract: A programmable integrated circuit is disclosed that includes a nonvolatile memory cell programmed to represent a configuration bit associated with a special purpose function. A volatile memory cell is associated with the nonvolatile memory cell. The integrated circuit includes a logic gate for logically combining states of the volatile and nonvolatile memory cells to selectively enable the special purpose function, even before the volatile memory cell is initialized. In this way, the predetermined function can be executed prior to a complete initialization of the integrated circuit.

Abstract: Programmable devices and methods of programming programmable devices are described. In one embodiment, a complex programmable logic device (CPLD) is programmed by a remote host programming unit that provides the configuration data over a data communications link into a first data-holding location on the device all at one time. The device is then locally programmed under the influence of a controller that causes the configuration data in the first data-holding location to be written or copied to a second data-holding location on the device. In one embodiment, the first data-holding location is a rapidly programmed temporary memory (e.g., RAM), while the second data-holding location is a non-volatile memory that takes much longer to program (e.g., EEPROM or flash memory) and actually controls the device functionality. This technique frees up the host programming unit and the data communications link to attend to other matters, such as providing configuration data to other programmable devices.