Abstract: The present disclosure relates to resource management of memory using information regarding the physical state of the memory device(s), and, more specifically, to attempting to reduce the heat dissipation of a memory device by managing the contents of the memory device.

Abstract: A method of electing a bootstrap processor from among a plurality of processor includes creating an atomic access shared location and electing one of said processors as the bootstrap processor.

Abstract: A system to initialize a memory device. An operating system executes an application program. A memory device has a plurality of memory addresses that hold data. A firmware device holds settings for the memory device and sends a completion signal to the operating system only after an initialization of the memory device has been completed in response to an initialization request being received from the operating system. A memory controller initializes a range of the memory addresses to a configurable value after receiving the initialization request from the firmware device, and sends the completion signal to the firmware device after the initialization is completed.

Abstract: A system to initialize a memory device. An operating system executes an application program. A memory device has a plurality of memory addresses that hold data. A firmware device holds settings for the memory device and sends a completion signal to the operating system only after an initialization of the memory device has been completed in response to an initialization request being received from the operating system. A memory controller initializes a range of the memory addresses to a configurable value after receiving the initialization request from the firmware device, and sends the completion signal to the firmware device after the initialization is completed.

Abstract: A method of electing a bootstrap processor from among a plurality of processor includes creating an atomic access shared location and electing one of said processors as the bootstrap processor.

Abstract: A method of electing a bootstrap processor from among a plurality of processor includes creating an atomic access shared location and electing one of said processors as the bootstrap processor.

Abstract: An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio.

Abstract: An apparatus includes a storage medium having stored therein a segmented basic input/output system (BIOS) divided among a plurality of segments within the storage medium, and a processor operative to execute the segmented BIOS. In accordance with the teachings of the present invention, the BIOS includes a recovery function that is mode dependent in that while the apparatus is in an update mode the recovery function executes a full reflash of all relevant segments of the segmented BIOS, whereas while the apparatus is in a normal mode the recovery function executes a partial reflash of only identified corrupted BIOS segments.

Abstract: An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio.