Patents by Inventor Frank Gottfried

Frank Gottfried has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200192932
    Abstract: A method, a system, and a computer program product for performing on-demand feature extraction from a raw image of an object for analysis. A query is executed to retrieve an image of an object. Using one or more parameters of the query, a raw image of the object is compressed to generate a compressed image of the object. One or more features associated with the object are extracted from the compressed image of the object. Based on the compressed image of the object, the image of the object is generated using the extracted one or more features of the object.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 18, 2020
    Inventors: Bjoern Deiseroth, Frank Gottfried
  • Patent number: 10671912
    Abstract: Technologies are provided for implementing temporal and spatio-temporal spiking neural networks (SNNs) using neuromorphic hardware devices. Temporal synapse circuits, with associated weight values, can be used to control spike times of connected neuron circuits. The controlled spike times of multiple neuron circuits can be used to temporally encode information in a neural network in neuromorphic hardware. Neuron circuits in a state space detection layer can be organized into multiple subsets. Neuron circuits in different subsets can be connected to output neuron circuits in an output layer by separate temporal synapse circuits. Spiking signals sent from the neuron circuits in the state space detection layer via separate temporal synapse circuits can cause associated output neuron circuits to generate output spiking signals at different times. The various spike times of the output neuron circuits can be aggregated to produce an output signal for the network.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: June 2, 2020
    Assignee: SAP SE
    Inventors: Frank Gottfried, Bjoern Deiseroth, Burkhard Neidecker-Lutz
  • Publication number: 20180075345
    Abstract: Technologies are provided for implementing temporal and spatio-temporal spiking neural networks (SNNs) using neuromorphic hardware devices. Temporal synapse circuits, with associated weight values, can be used to control spike times of connected neuron circuits. The controlled spike times of multiple neuron circuits can be used to temporally encode information in a neural network in neuromorphic hardware. Neuron circuits in a state space detection layer can be organized into multiple subsets. Neuron circuits in different subsets can be connected to output neuron circuits in an output layer by separate temporal synapse circuits. Spiking signals sent from the neuron circuits in the state space detection layer via separate temporal synapse circuits can cause associated output neuron circuits to generate output spiking signals at different times. The various spike times of the output neuron circuits can be aggregated to produce an output signal for the network.
    Type: Application
    Filed: September 13, 2016
    Publication date: March 15, 2018
    Applicant: SAP SE
    Inventors: Frank Gottfried, Bjoem Deiseroth, Burkhard Neidecker-Lutz
  • Patent number: 9449907
    Abstract: Various methods and apparatus for joining stacked substrates to a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes coupling plural substrates to form a stack. At least one of the plural substrates is a semiconductor chip. Plural conductive vias are formed in a first of the plural substrates. Each of the plural conductive vias includes a first end positioned in the first substrate and a second end projecting out of the first substrate.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: September 20, 2016
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Lei Fu, Frank Gottfried Kuechenmeister, Michael Zhuoying Su
  • Publication number: 20150279773
    Abstract: Various methods and apparatus for joining stacked substrates to a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes coupling plural substrates to form a stack. At least one of the plural substrates is a semiconductor chip. Plural conductive vias are formed in a first of the plural substrates. Each of the plural conductive vias includes a first end positioned in the first substrate and a second end projecting out of the first substrate.
    Type: Application
    Filed: June 12, 2015
    Publication date: October 1, 2015
    Inventors: Lei Fu, Frank Gottfried Kuechenmeister, Michael Zhuoying Su
  • Publication number: 20120193788
    Abstract: Various methods and apparatus for joining stacked substrates to a circuit board are disclosed. In one aspect, a method of manufacturing is provided that includes coupling plural substrates to form a stack. At least one of the plural substrates is a semiconductor chip. Plural conductive vias are formed in a first of the plural substrates. Each of the plural conductive vias includes a first end positioned in the first substrate and a second end projecting out of the first substrate.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 2, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Lei Fu, Frank Gottfried Kuechenmeister, Michael Zhuoying Su