Patents by Inventor Frank Hwang
Frank Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12236360Abstract: A method, a computer system, and a computer program product for a shiftleft topology construction is provided. Embodiments of the present invention may include collecting datasets. Embodiments of the present invention may include extracting topological entities from the datasets. Embodiments of the present invention may include correlating a plurality of data from the topological entities. Embodiments of the present invention may include mapping the topological entities. Embodiments of the present invention may include marking entry points for a plurality of subgraphs of the topological entities. Embodiments of the present invention may include constructing a topology graph.Type: GrantFiled: September 17, 2020Date of Patent: February 25, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jinho Hwang, Larisa Shwartz, Srinivasan Parthasarathy, Qing Wang, Michael Elton Nidd, Frank Bagehorn, Jakub Krchák, Ota Sandr, Tomáš Ondrej, Michal Mýlek, Altynbek Orumbayev, Randall M George
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Publication number: 20250046301Abstract: A display device includes a diffusion layer providing a single well, an optical element configured to receive light and output the received image light including a concentric series of lens segments made up of active facets, and a waveguide having an in-coupling grating and a waveguide body optically coupled to the image light, where a polarizing component is disposed over an output surface of the optical element. A method to improve a yield of silicon backplane displays includes connecting a diode having a resolution to a backplane and repairing a defect on a pixel display area by dividing the pixel display area into at least one subcircuit, while improving geometry stylization transfer for 3D models of real-world environments. A method for suppressing crosstalk for user conversations includes receiving multiple speech signals captured by multiple microphones and generating directional data for the multiple speech signals based on spatial filtering.Type: ApplicationFiled: July 29, 2024Publication date: February 6, 2025Inventors: Balasubramanian Sivakumar, Min Hyuk Choi, Gang Chen, Gyungmin Kim, Ahmet Tura, Hai Jung In, Weiwei Wang, Suhui Lee, Woong Hwang, Wanyue Song, Wai Sze Tiffany Lam, Wanli Chi, Nikolaos Sarafianos, Rakesh Ranjan, Alexander Sorkine Hornung, Seonghyeon Nam, Hyunyoung Jung, Ruiming Xie, Ju Lin, Niko Moritz, Frank Torsten Bernd Seide
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Publication number: 20210345549Abstract: A bracket system for attaching a brush to the blades of a rotary lawn mower. The bracket system has a brush attachment, at least one clamp, and a fastening device. The brush attachment has a brush, an elongated vertical slot, and a flange. The at least one clamp is placed around a non-linear lawn mower blade and is secured to the flange by the fastening device. Securing the clamp to the flange by the fastening device secures the brush attachment to the non-linear mower blade. Securing or removing the fastening device allows the attachment or removal of the brush attachment from the clamps, and thus the non-linear mower blade. In another embodiment, the bracket system includes a blade attachment configured to removably attach to the at least one clamp. The blade attachment is positioned on the opposite end of the non-linear lawn mower blade from the brush attachment.Type: ApplicationFiled: May 4, 2021Publication date: November 11, 2021Inventor: Frank Hwang
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Publication number: 20210345548Abstract: A bracket system for attaching a brush to the blades of a rotary lawn mower. The bracket system has a brush attachment, at least one clamp, and a fastening device. The brush attachment has a brush, an elongated vertical slot, and a flange. The at least one clamp is placed around a non-linear lawn mower blade and is secured to the flange by the fastening device. Securing the clamp to the flange by the fastening device secures the brush attachment to the non-linear mower blade. Securing or removing the fastening device allows the attachment or removal of the brush attachment from the clamps, and thus the non-linear mower blade.Type: ApplicationFiled: May 11, 2020Publication date: November 11, 2021Inventor: Frank Hwang
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Patent number: 8248091Abstract: A universal system for testing different semiconductor devices provides a probe head with a probe pattern that may be used to test different test patterns formed on different semiconductor devices. Each of a plurality of bumps or pads of the test pattern contacts a corresponding probe of the probe head to enable the semiconductor device to be tested. The universal probe head may additionally or alternatively include a substrate design on the probe head that provides a pattern on the substrate of the probe head that may be used in conjunction with different patterns formed on a plurality of different printed circuit boards for testing different semiconductor devices.Type: GrantFiled: October 20, 2006Date of Patent: August 21, 2012Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsu Ming Cheng, Yung-Liang Kuo, Pi-Huang Lee, Ann Luh, Frank Hwang, Wen-Hung Wu
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Patent number: 7642793Abstract: A system and a method of testing a semiconductor die is provided. An embodiment comprises a plurality of metal tips that are connected to a redistribution layer that fans out the pitch from the tips to metal plugs located in the substrate. The metal tips could be formed using semiconductor processes and either adding smaller layers of metal to larger layers of metal or else removing portions of one piece of metal to form the tips. The metal plugs are connected to a space transformation layer. The space transformation layer is electrically connected to a printed circuit board using, for example, a spring loaded connection such as a pogo pin. The space transformation layer is aligned onto the printed circuit board by a series of guidance mechanisms such as smooth fixtures, and the planarity of the tips is adjusted by adjusting a series of screws.Type: GrantFiled: June 25, 2007Date of Patent: January 5, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsu Ming Cheng, Frank Hwang, Clinton Chao
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Patent number: 7602226Abstract: A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset value(s), and combinations of such.Type: GrantFiled: December 29, 2006Date of Patent: October 13, 2009Assignee: Integrated Device Technology, Inc.Inventors: Frank Hwang, Howard Yang, Chuen-Der Lien, Jimmy Lee
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Publication number: 20080116923Abstract: A system and a method of testing a semiconductor die is provided. An embodiment comprises a plurality of metal tips that are connected to a redistribution layer that fans out the pitch from the tips to metal plugs located in the substrate. The metal tips could be formed using semiconductor processes and either adding smaller layers of metal to larger layers of metal or else removing portions of one piece of metal to form the tips. The metal plugs are connected to a space transformation layer. The space transformation layer is electrically connected to a printed circuit board using, for example, a spring loaded connection such as a pogo pin. The space transformation layer is aligned onto the printed circuit board by a series of guidance mechanisms such as smooth fixtures, and the planarity of the tips is adjusted by adjusting a series of screws.Type: ApplicationFiled: June 25, 2007Publication date: May 22, 2008Inventors: Hsu Ming Cheng, Frank Hwang, Clinton Chao
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Publication number: 20080094093Abstract: A universal system for testing different semiconductor devices provides a probe head with a probe pattern that may be used to test different test patterns formed on different semiconductor devices. Each of a plurality of bumps or pads of the test pattern contacts a corresponding probe of the probe head to enable the semiconductor device to be tested. The universal probe head may additionally or alternatively include a substrate design on the probe head that provides a pattern on the substrate of the probe head that may be used in conjunction with different patterns formed on a plurality of different printed circuit boards for testing different semiconductor devices.Type: ApplicationFiled: October 20, 2006Publication date: April 24, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ming-Cheng Hsu, Y. L. Kuo, Pi-Huang Lee, Ann Luh, Frank Hwang, Wen-Hung Wu
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Patent number: 7308596Abstract: A method and apparatus for Clock and PLL N-Divider Switch have been disclosed.Type: GrantFiled: October 27, 2004Date of Patent: December 11, 2007Assignee: Integrated Device Technology, Inc.Inventors: Frank Hwang, Gang Shan
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Patent number: 7268599Abstract: A method and apparatus for a buffer with programmable skew have been disclosed. Several output signals are generated. Based on one of the output signals several feedback signals are generated. The feedback signals are then received and compared. Based on the comparisons, the skew between the output signals is adjusted.Type: GrantFiled: February 2, 2005Date of Patent: September 11, 2007Assignee: Integrated Device Technology, Inc.Inventor: Frank Hwang
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Patent number: 7176738Abstract: A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset values(s), and combinations of such.Type: GrantFiled: November 19, 2004Date of Patent: February 13, 2007Assignee: Integrated Device Technology, Inc.Inventors: Frank Hwang, Howard Yang, Chuen-Der Lien, Jimmy Lee
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Patent number: 6963992Abstract: An apparatus comprising a circuit that may be configured to (i) change a frequency of one or more first signals in response to a second signal and (ii) generate a third signal in response to either the second signal or a predetermined time period expiring.Type: GrantFiled: September 28, 2000Date of Patent: November 8, 2005Assignee: Cypress Semiconductor Corp.Inventors: Paul Lap Tak Cheng, Kuang-Yu Chen, Frank Hwang, Hueng-Cheng Eric Chen, Hyunbae Kim
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Patent number: D414764Type: GrantFiled: December 24, 1997Date of Patent: October 5, 1999Assignee: I-See-You CorporationInventors: Frank Hwang, Niel Mazurek, Mark Schwandt
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Patent number: D425054Type: GrantFiled: September 8, 1999Date of Patent: May 16, 2000Assignee: I-See-You CorporationInventors: Frank Hwang, Niel Mazurek, Mark Schwandt