Abstract: A pipeline tester is disclosed that is capable of testing systems-on-a-chip (SOCs) or Devices Under Test (DUTs) in pipeline fashion. The tester provides faster, more economical testing of such SOCs and DUTs, which are loaded sequentially into the tester. A plurality of underlying test stations are disposed in the tester. Above the test stations are disposed corresponding test fixtures which are configured to receive moveable test beds therein. The test beds are mechanically and electrically connected to the underlying test stations. Loaded within each test bed is an SOC or DUT. One or more electrical or electronic tests are performed on each SOC or DUT while the SOC or DUT is loaded in a test bed positioned above a test station. Once the test has been completed, the test bed is moved to another test station, where another electrical or electronic test is performed. Electrical or electronic tests may be performed in parallel on different DUTs or SOCs loaded into different test beds.