Patents by Inventor Frank Hwang

Frank Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915150
    Abstract: Systems, computer-implemented methods, and computer program products that can facilitate refinement of a predicted event based on explainability data are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an interpreter component that identifies a probable cause of a predicted event based on explainability data. The computer executable components can further comprise an enrichment component that executes a diagnostic analysis based on the probable cause.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: February 27, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Larisa Shwartz, Frank Bagehorn, Jinho Hwang, Marcos Vinicius L. Paraiso, Rafal Bigaj, Vidhya Shankar Venkatesan, Dorothea Wiesmann Rothuizen, Amol Bhaskar Mahamuni
  • Publication number: 20210345549
    Abstract: A bracket system for attaching a brush to the blades of a rotary lawn mower. The bracket system has a brush attachment, at least one clamp, and a fastening device. The brush attachment has a brush, an elongated vertical slot, and a flange. The at least one clamp is placed around a non-linear lawn mower blade and is secured to the flange by the fastening device. Securing the clamp to the flange by the fastening device secures the brush attachment to the non-linear mower blade. Securing or removing the fastening device allows the attachment or removal of the brush attachment from the clamps, and thus the non-linear mower blade. In another embodiment, the bracket system includes a blade attachment configured to removably attach to the at least one clamp. The blade attachment is positioned on the opposite end of the non-linear lawn mower blade from the brush attachment.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 11, 2021
    Inventor: Frank Hwang
  • Publication number: 20210345548
    Abstract: A bracket system for attaching a brush to the blades of a rotary lawn mower. The bracket system has a brush attachment, at least one clamp, and a fastening device. The brush attachment has a brush, an elongated vertical slot, and a flange. The at least one clamp is placed around a non-linear lawn mower blade and is secured to the flange by the fastening device. Securing the clamp to the flange by the fastening device secures the brush attachment to the non-linear mower blade. Securing or removing the fastening device allows the attachment or removal of the brush attachment from the clamps, and thus the non-linear mower blade.
    Type: Application
    Filed: May 11, 2020
    Publication date: November 11, 2021
    Inventor: Frank Hwang
  • Patent number: 8248091
    Abstract: A universal system for testing different semiconductor devices provides a probe head with a probe pattern that may be used to test different test patterns formed on different semiconductor devices. Each of a plurality of bumps or pads of the test pattern contacts a corresponding probe of the probe head to enable the semiconductor device to be tested. The universal probe head may additionally or alternatively include a substrate design on the probe head that provides a pattern on the substrate of the probe head that may be used in conjunction with different patterns formed on a plurality of different printed circuit boards for testing different semiconductor devices.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: August 21, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsu Ming Cheng, Yung-Liang Kuo, Pi-Huang Lee, Ann Luh, Frank Hwang, Wen-Hung Wu
  • Patent number: 7642793
    Abstract: A system and a method of testing a semiconductor die is provided. An embodiment comprises a plurality of metal tips that are connected to a redistribution layer that fans out the pitch from the tips to metal plugs located in the substrate. The metal tips could be formed using semiconductor processes and either adding smaller layers of metal to larger layers of metal or else removing portions of one piece of metal to form the tips. The metal plugs are connected to a space transformation layer. The space transformation layer is electrically connected to a printed circuit board using, for example, a spring loaded connection such as a pogo pin. The space transformation layer is aligned onto the printed circuit board by a series of guidance mechanisms such as smooth fixtures, and the planarity of the tips is adjusted by adjusting a series of screws.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: January 5, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsu Ming Cheng, Frank Hwang, Clinton Chao
  • Patent number: 7602226
    Abstract: A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset value(s), and combinations of such.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: October 13, 2009
    Assignee: Integrated Device Technology, Inc.
    Inventors: Frank Hwang, Howard Yang, Chuen-Der Lien, Jimmy Lee
  • Publication number: 20080116923
    Abstract: A system and a method of testing a semiconductor die is provided. An embodiment comprises a plurality of metal tips that are connected to a redistribution layer that fans out the pitch from the tips to metal plugs located in the substrate. The metal tips could be formed using semiconductor processes and either adding smaller layers of metal to larger layers of metal or else removing portions of one piece of metal to form the tips. The metal plugs are connected to a space transformation layer. The space transformation layer is electrically connected to a printed circuit board using, for example, a spring loaded connection such as a pogo pin. The space transformation layer is aligned onto the printed circuit board by a series of guidance mechanisms such as smooth fixtures, and the planarity of the tips is adjusted by adjusting a series of screws.
    Type: Application
    Filed: June 25, 2007
    Publication date: May 22, 2008
    Inventors: Hsu Ming Cheng, Frank Hwang, Clinton Chao
  • Publication number: 20080094093
    Abstract: A universal system for testing different semiconductor devices provides a probe head with a probe pattern that may be used to test different test patterns formed on different semiconductor devices. Each of a plurality of bumps or pads of the test pattern contacts a corresponding probe of the probe head to enable the semiconductor device to be tested. The universal probe head may additionally or alternatively include a substrate design on the probe head that provides a pattern on the substrate of the probe head that may be used in conjunction with different patterns formed on a plurality of different printed circuit boards for testing different semiconductor devices.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 24, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Cheng Hsu, Y. L. Kuo, Pi-Huang Lee, Ann Luh, Frank Hwang, Wen-Hung Wu
  • Patent number: 7308596
    Abstract: A method and apparatus for Clock and PLL N-Divider Switch have been disclosed.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: December 11, 2007
    Assignee: Integrated Device Technology, Inc.
    Inventors: Frank Hwang, Gang Shan
  • Patent number: 7268599
    Abstract: A method and apparatus for a buffer with programmable skew have been disclosed. Several output signals are generated. Based on one of the output signals several feedback signals are generated. The feedback signals are then received and compared. Based on the comparisons, the skew between the output signals is adjusted.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: September 11, 2007
    Assignee: Integrated Device Technology, Inc.
    Inventor: Frank Hwang
  • Patent number: 7176738
    Abstract: A method and apparatus for clock generation have been disclosed having a selector logic block that controls operation based upon inputs such as analog input(s), digital input(s), a lookup table, and preset values(s), and combinations of such.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: February 13, 2007
    Assignee: Integrated Device Technology, Inc.
    Inventors: Frank Hwang, Howard Yang, Chuen-Der Lien, Jimmy Lee
  • Patent number: 6963992
    Abstract: An apparatus comprising a circuit that may be configured to (i) change a frequency of one or more first signals in response to a second signal and (ii) generate a third signal in response to either the second signal or a predetermined time period expiring.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: November 8, 2005
    Assignee: Cypress Semiconductor Corp.
    Inventors: Paul Lap Tak Cheng, Kuang-Yu Chen, Frank Hwang, Hueng-Cheng Eric Chen, Hyunbae Kim
  • Patent number: D414764
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: October 5, 1999
    Assignee: I-See-You Corporation
    Inventors: Frank Hwang, Niel Mazurek, Mark Schwandt
  • Patent number: D425054
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: May 16, 2000
    Assignee: I-See-You Corporation
    Inventors: Frank Hwang, Niel Mazurek, Mark Schwandt