Patents by Inventor Frank J. Campisi

Frank J. Campisi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090056933
    Abstract: A power slip that utilizes modified SDXL slips and regular drilling bowls that fits to the pin drive master bushings of the rotary table and utilizes the depth of the drive pin holes as part of the actuators, thus allowing the power slip to set lower for added clearance and safety during drilling operations. Cables are anchored to a base plate and slip linkages and slip connectors are pivotally mounted to the slips and to the top plate so that, when the lift cylinders are actuated, the slips are moved to the released position. This two-stage linkage and cable design maximizes the movement of the slip assemblies while minimizing vertical movement of the power slip's housing.
    Type: Application
    Filed: August 12, 2008
    Publication date: March 5, 2009
    Inventors: Frank J. Campisi, Jeffrey L. Bertelsen
  • Patent number: 7419008
    Abstract: A power slip that utilizes modified SDXL slips and regular drilling bowls that fits to the pin drive master bushings of the rotary table and utilizes the depth of the drive pin holes as part of the actuators, thus allowing the power slip to set lower for added clearance and safety during drilling operations. Cables are anchored to a base plate and slip linkages and slip connectors are pivotally mounted to the slips and to the top plate so that, when the lift cylinders are actuated, the slips are moved to the released position. This two-stage linkage and cable design maximizes the movement of the slip assemblies while minimizing vertical movement of the power slip's housing.
    Type: Grant
    Filed: April 29, 2006
    Date of Patent: September 2, 2008
    Inventors: Frank J. Campisi, Jeffrey L. Bertelsen
  • Patent number: 6769920
    Abstract: A connection assembly for providing interconnection between a computer processor assembly and a module is provided. The connection assembly includes a flex circuit having signal paths for communication between the computer processor assembly and the module. The connection assembly also includes a connector coupled to an end portion of the flex circuit and configured to connect to the computer processor assembly. The connection assembly also includes another connector coupled to an opposite end portion of the flex circuit and is configured to connect to the module. The flex circuit is configured to facilitate movement of the module with respect to the computer processor assembly, the flex circuit having a retracted position with the module proximate to the computer processor assembly and an extended position with the module spaced from the computer processor assembly.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: August 3, 2004
    Assignee: Unisys Corporation
    Inventors: Keith D. Mease, Sean M. McClain, Frank J Campisi, Norman K Newman
  • Patent number: 6428327
    Abstract: An adapter is provided for use with a land grid array (LGA) device that is mounted on a circuit board, wherein an interposer socket having compliant contacts provides electrical coupling between pads provided on the LGA device and pads provided on the circuit board. The adapter includes a flexible substrate and a plurality of conductors extending through the flexible substrate. The flexible substrate is configured to flex in reaction to the force exerted by the compliant contacts of the interposer socket. A circuit board assembly and method are also provided. The adapter may include a periphery pad (416) for solder connection to an external circuit wire (336) and is usable for modification of the circuitry on the circuit board.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: August 6, 2002
    Assignee: Unisys Corporation
    Inventors: Vladimir K. Tamarkin, Frank J. Campisi
  • Patent number: 6022466
    Abstract: A process for plating gold on a multi-layered printed circuit board, having plated copper on an external surface. In one embodiment, first copper features for plating gold thereon and second copper features for plating copper thereon are selected on the external surface. The first copper features are internally connected to the second copper features. An etch-resist on the first and second copper features is deposited. The second copper features are masked, while a region containing the first copper features is exposed. Copper from the region is etched. The etch-resist on the first copper features is removed. Gold is then plated on the first copper features.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: February 8, 2000
    Assignee: Unisys Corporation
    Inventors: Vladimir K. Tamarkin, Frank J. Campisi