Patents by Inventor Frank Jun

Frank Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11631600
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 18, 2023
    Assignee: CEREBRAS SYSTEMS INC.
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Publication number: 20200381274
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Application
    Filed: August 14, 2020
    Publication date: December 3, 2020
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Patent number: 10784128
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: September 22, 2020
    Assignee: Cerebras Systems Inc.
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Publication number: 20200006097
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Application
    Filed: September 11, 2019
    Publication date: January 2, 2020
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Patent number: 10453717
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: October 22, 2019
    Assignee: Cerebras Systems Inc.
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Publication number: 20190172736
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Application
    Filed: February 5, 2019
    Publication date: June 6, 2019
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Patent number: 10242891
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: March 26, 2019
    Assignee: Cerebras Systems Inc.
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Publication number: 20190067052
    Abstract: Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements
    Type: Application
    Filed: August 7, 2018
    Publication date: February 28, 2019
    Inventors: Jean-Philippe Fricker, Frank Jun, Paul Kennedy
  • Patent number: 9585283
    Abstract: A high insertion force ejector is provided. The high insertion force ejector includes an ejector mounting base, a pressure bar-ejector tooth, a first cam, and a second cam. The pressure bar-ejector tooth is connected to the ejector mounting base. A lever handle is operatively connected to the pressure bar-ejector and the ejector mounting base. The first cam and the second cam are operatively connected to the pressure bar-ejector tooth and the lever handle.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: February 28, 2017
    Assignee: Cisco Technology, Inc.
    Inventors: Vic Hong Chia, Mandy Hin Lam, Frank Jun, Hong Tran Huynh
  • Publication number: 20140187068
    Abstract: A high insertion force ejector may be provided. The high insertion force ejector may comprise an ejector mounting base, a pressure bar-ejector tooth, a first cam, and a second cam. The pressure bar-ejector tooth may be connected to the ejector mounting base. A lever handle may be operatively connected to the pressure bar-ejector and the ejector mounting base. The first cam and the second cam may be operatively connected to the pressure bar-ejector tooth and the lever handle.
    Type: Application
    Filed: December 27, 2012
    Publication date: July 3, 2014
    Applicant: Cisco Technology, Inc.
    Inventors: Vic Hong Chia, Mandy Hin Lam, Frank Jun, Hong Tran Huynh
  • Patent number: D549089
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: August 21, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Frank Jun, Michael Chern, Saeed Seyed