Abstract: Disclosed subject matter relates generally to graphics processing, and relates more particularly to processing graphics vertex content.

Abstract: A method of operating a graphics processor to process sets of geometry to generate an output. Each set of geometry is associated with lower level geometry including vertex data to be used when rendering the geometry as well a separate higher level representation of the geometry. The higher level representations of the geometry can be obtained by the graphics processor independently of the other, lower level geometry and used to determine which sets of geometry should be processed for which regions of the output. Once this determination is made, the regions can be rendered by obtaining and processing the lower level geometry accordingly.

Abstract: A method of processing data in a graphics processor when performing tile-based rendering in which a render output is sub-divided into a plurality of tiles for rendering. The rendering is performed as two separate processing passes: a first processing pass that sorts primitives into respective regions of the render output and a second processing pass that renders the tiles into which the render output is sub-divided for rendering. During the first processing pass, “tile elimination” data is generated indicative of which of the rendering tiles should be rendered during the second processing pass. The tile elimination data generated in the first processing pass can then be used to control the rendering of tiles during the second processing pass.

Abstract: When generating a graphics processing output, a sequence of one or more of primitives to be processed when generating the output is assembled from a set of vertex indices provided for the output based on primitive configuration information provided for the output, each assembled primitive of the sequence of assembled primitives comprising an identifier for the primitive and a set of one or more vertex indices for the primitive. One or more attributes for vertices of the assembled primitives are then shaded and fetched based on the vertex indices of the assembled primitives. The assembled primitives including their shaded fetched vertex attribute(s) are then provided to later stages of the graphics processing pipeline for processing.

Abstract: The present disclosure relates to tile-based rendering systems. In particular there is provided a new primitive list format in which a sequence of commands generated for the primitive list includes a number of different respective types of commands including ‘primitive’ type commands storing primitive data, ‘state’ type commands storing state data and ‘configuration’ type commands for storing configuration data, wherein the primitive, state and configuration data can accordingly be stored separately in the primitive list, using the different respective types of commands. Also disclosed are techniques for encoding the data into the respective different types of commands.

Abstract: The present disclosure relates to tile-based rendering systems. In particular comprises a method for encoding primitive metadata into a primitive list in which a primitive metadata command is included into the primitive list that is able to indicate types of primitive metadata from a set of different types of primitive metadata that can be indicated by the primitive metadata command are included into the primitive list in association with the primitive metadata command. The indicated primitive metadata can then be included in the primitive list following the primitive metadata command. Corresponding primitive list formats and graphics processing systems using such primitive metadata command are also disclosed.

Abstract: When performing tile-based graphics processing, a first vertex shading operation to generate vertex shaded position data for vertices is performed, and the vertex shaded position data used to prepare primitive lists indicating which primitives should be rendered for respective rendering tiles. Then, when processing a tile, a second vertex shading operation is performed for vertices of primitives for the tile for which fragments have been generated by a rasteriser prior to rendering the graphics fragments, to generate vertex shaded non-position attribute data for the vertices, based on the results of early depth testing before the fragments are rendered.

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

Abstract: Disclosed subject matter relates generally to graphics processing, and relates more particularly to processing graphics vertex content.

Abstract: When generating a graphics processing output, a sequence of one or more of primitives to be processed when generating the output is assembled from a set of vertex indices provided for the output based on primitive configuration information provided for the output, each assembled primitive of the sequence of assembled primitives comprising an identifier for the primitive and a set of one or more vertex indices for the primitive. One or more attributes for vertices of the assembled primitives are then shaded and fetched based on the vertex indices of the assembled primitives. The assembled primitives including their shaded fetched vertex attribute(s) are then provided to later stages of the graphics processing pipeline for processing.

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

Abstract: A method of operating a graphics processor that is configured to execute a graphics processing pipeline is provided. The method comprises the graphics processor reading, from an index buffer in external memory, a block of data comprising plural sets of indices, each set of indices comprising a sequence of indices indexing a set of vertices that defines a primitive of a plurality of primitives to be processed by the graphics processing pipeline. The graphics processor compresses the block of data to form a compressed version of the block of data, and stores the compressed version of the block of data in an internal memory of the graphics processor.

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.

Abstract: A graphics processing pipeline includes: a position shader, a tiler, a pool of memory for storing primitive lists and vertex shaded attributes data for vertices, a varying-only vertex shader, and a fragment frontend and shader. The position shader performs vertex shading for the positional attributes of the vertices of a set of vertices to be processed by the graphics processing pipeline. The tiler uses the vertex shaded position data to identify primitives that should be processed further to generate the render output. When the tiler determines that a vertex should be processed further to generate the render output, it allocates memory space in the memory pool for storing vertex shaded attributes data for the vertex. Vertex shaded attributes data for the vertex is then stored in the allocated space in the memory pool for later use, e.g., by the fragment frontend and shader.

Abstract: A graphics processing pipeline includes: a position shader, a tiler, a pool of memory for storing primitive lists and vertex shaded attributes data for vertices, a varying-only vertex shader, and a fragment frontend and shader. The position shader performs vertex shading for the positional attributes of the vertices of a set of vertices to be processed by the graphics processing pipeline. The tiler uses the vertex shaded position data to identify primitives that should be processed further to generate the render output. When the tiler determines that a vertex should be processed further to generate the render output, it allocates memory space in the memory pool for storing vertex shaded attributes data for the vertex. Vertex shaded attributes data for the vertex is then stored in the allocated space in the memory pool for later use, e.g., by the fragment frontend and shader.

Abstract: A graphics processing apparatus is provided with rendering circuitry which separately renders different areas of a frame of pixel values. Monitoring circuitry coupled to the rendering circuitry captures for each area rendered one or more parameters and stores these parameters to a parameter memory. A performance frame can be generated from the captured and stored parameters with performance-representing pixel values for each area within the performance frame corresponding to an area within the image frame and having a visual characteristic selected in dependence upon the performance parameter which was captured. The visual characteristic may be a grey-scale value, a pixel intensity or a pixel color.

Abstract: A graphics processing apparatus is provided with rendering circuitry which separately renders different areas of a frame of pixel values. Monitoring circuitry coupled to the rendering circuitry captures for each area rendered one or more parameters and stores these parameters to a parameter memory. A performance frame can be generated from the captured and stored parameters with performance-representing pixel values for each area within the performance frame corresponding to an area within the image frame and having a visual characteristic selected in dependence upon the performance parameter which was captured. The visual characteristic may be a grey-scale value, a pixel intensity or a pixel colour.

Abstract: A graphics processing apparatus is provided with rendering circuitry which separately renders different areas of a frame of pixel values. Monitoring circuitry coupled to the rendering circuitry captures for each area rendered one or more parameters and stores these parameters to a parameter memory. A performance frame can be generated from the captured and stored parameters with performance-representing pixel values for each area within the performance frame corresponding to an area within the image frame and having a visual characteristic selected in dependence upon the performance parameter which was captured. The visual characteristic may be a grey-scale value, a pixel intensity or a pixel color.

Abstract: A graphics processing apparatus 6 is provided with rendering circuitry 24 which separately renders different areas of a frame of pixel values. Monitoring circuitry 30, 32, 34, 36, 38, 40 coupled to the rendering circuitry 24 captures for each area rendered one or more parameters and stores these parameters to a parameter memory 8. A performance frame can be generated from the captured and stored parameters with performance-representing pixel values for each area within the performance frame corresponding to an area within the image frame and having a visual characteristic selected in dependence upon the performance parameter which was captured. The visual characteristic may be a grey-scale value, a pixel intensity or a pixel colour.