Patents by Inventor Frank Kuijstermans

Frank Kuijstermans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit and method for suppressing switching and supply-related errors in a PWM power stage by instantaneous per-pulse feedback
    Patent number: 7518442
    Abstract: A class D amplifier is provided. The class D amplifier includes a modulator and a class D power stage. The modulator provides a PWM output signal to the class D power stage. For each pulse of the PWM input signal, the class D amplifier provides a corresponding pulse in the PWM output signal, such that the pulse is terminated when the area under the pulse of the output of the class D power stage is substantially equal to the area under the pulse of the corresponding PWM input signal. In this way, the class D amplifier provides instantaneous per-pulse PWM feedback.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: April 14, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Gerrit Dijkstra, Frank Kuijstermans
  • Method and system for integrated circuit RF immunity enhancement
    Patent number: 7403749
    Abstract: Method and system for enhancing RF immunity of integrated circuits (ICs). Susceptibility of different subcircuits within the IC is determined by simulation or bench testing. Relatively simple filters are implemented based on the susceptible frequency range and circuit parameters such as impedance. Filter(s) may be integrated into the IC avoiding PCB level redesign. Susceptibility determination and mitigation method may be applied to new IC designs or existing ICs without major redesign.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: July 22, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Frank Kuijstermans, Gerrit Dijkstra
  • Method and system for integrated circuit RF immunity enhancement
    Publication number: 20070010214
    Abstract: Method and system for enhancing RF immunity of integrated circuits (ICs). Susceptibility of different subcircuits within the IC is determined by simulation or bench testing. Relatively simple filters are implemented based on the susceptible frequency range and circuit parameters such as impedance. Filter(s) may be integrated into the IC avoiding PCB level redesign. Susceptibility determination and mitigation method may be applied to new IC designs or existing ICs without major redesign.
    Type: Application
    Filed: July 11, 2005
    Publication date: January 11, 2007
    Applicant: National Semiconductor Corporation
    Inventors: Frank Kuijstermans, Gerrit Dijkstra