Patents by Inventor Frank L. Hall
Frank L. Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8093730Abstract: An apparatus and method may be used for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with a plurality of discrete adhesive elements so as to provide a gap or standoff therebetween. Wire bonds may then be formed between bond pads on the semiconductor die to conductive pads or terminals on the carrier substrate. With this arrangement, a dielectric filler material is disposed in the gap or standoff to form a permanent bonding agent between the semiconductor die and the carrier substrate. By applying the dielectric filler material after forming the wire bonds, the dielectric filler material coats at least a portion of the wire bonds to stabilize the wire bonds and prevent wire sweep in an encapsulation process, such as transfer molding, performed thereafter.Type: GrantFiled: October 25, 2006Date of Patent: January 10, 2012Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7851907Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: GrantFiled: January 30, 2008Date of Patent: December 14, 2010Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7642643Abstract: A method and apparatus for assembling and packaging semiconductor die assemblies utilizes a coating element such as a wafer back side laminate formed on a back side of a semiconductor die is disclosed. The coating element may be formed from a somewhat compressible and, optionally, resilient material, which seals against a surface of a mold cavity while the semiconductor die assembly is being encapsulated. In this manner, the coating element prevents encapsulant material from covering at least a portion of the back side of the semiconductor die to prevent encapsulant flashing over the back side and thus improve heat dissipation characteristics of the packaged semiconductor die during operation.Type: GrantFiled: August 24, 2005Date of Patent: January 5, 2010Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Todd O. Bolken
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Patent number: 7498606Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method for manufacturing a plurality of microelectronic imaging units includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include a first height, an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member and forming a base on the support member between adjacent imaging dies. The base has a second height less than or approximately equal to the first height of the dies. The method further includes attaching a plurality of covers to the base so that the covers are positioned over corresponding image sensors.Type: GrantFiled: June 1, 2006Date of Patent: March 3, 2009Assignee: Micron Technology, Inc.Inventors: Bret K. Street, Frank L. Hall, James M. Derderian
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Patent number: 7485971Abstract: An electronic device package is described that includes a non-metal die attached adhesive. The die attach is positioned in discrete positions on a surface to which the die will be fixed. The die is placed on the discrete die attach. The die attach, in an embodiment, is an epoxy resin or other material that is cured. After curing, the die is electrically connected to an external circuit. The volume between the die and surface is filled with an underfill. In an embodiment, underfill cross-links with the die attach.Type: GrantFiled: August 31, 2005Date of Patent: February 3, 2009Assignee: Micron Technology, Inc.Inventors: Jason L. Fuller, Frank L. Hall, Tongbi Jiang
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Patent number: 7468559Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: GrantFiled: July 5, 2006Date of Patent: December 23, 2008Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7417294Abstract: Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes disposing a plurality of discrete stand-offs on the support member. The discrete stand-offs are arranged in arrays relative to corresponding imaging dies. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member, and attaching a plurality of covers to corresponding stand-off arrays so that the covers are positioned over the image sensors.Type: GrantFiled: January 17, 2007Date of Patent: August 26, 2008Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, William J. Reeder, Bret K. Street, James M. Derderian
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Patent number: 7416913Abstract: Microelectronic imaging units and methods for manufacturing microelectronic imaging units are disclosed herein. In one embodiment, a method includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes disposing a plurality of discrete stand-offs on the support member. The discrete stand-offs are arranged in arrays relative to corresponding imaging dies. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member, and attaching a plurality of covers to corresponding stand-off arrays so that the covers are positioned over the image sensors.Type: GrantFiled: July 16, 2004Date of Patent: August 26, 2008Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, William J. Reeder, Bret K. Street, James M. Derderian
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Publication number: 20080142950Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: ApplicationFiled: January 30, 2008Publication date: June 19, 2008Applicant: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7364934Abstract: Methods for manufacturing microelectronic imaging units and microelectronic imaging units that are formed using such methods are disclosed herein. In one embodiment, a method for manufacturing a plurality of microelectronic imaging units includes placing a plurality of singulated imaging dies on a support member. The individual imaging dies include a first height, an image sensor, an integrated circuit operably coupled to the image sensor, and a plurality of external contacts operably coupled to the integrated circuit. The method further includes electrically connecting the external contacts of the imaging dies to corresponding terminals on the support member and forming a base on the support member between adjacent imaging dies. The base has a second height less than or approximately equal to the first height of the dies. The method further includes attaching a plurality of covers to the base so that the covers are positioned over corresponding image sensors.Type: GrantFiled: August 10, 2004Date of Patent: April 29, 2008Assignee: Micron Technology, Inc.Inventors: Bret K. Street, Frank L. Hall, James M. Derderian
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Patent number: 7342319Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: GrantFiled: July 5, 2006Date of Patent: March 11, 2008Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7276802Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: GrantFiled: April 15, 2002Date of Patent: October 2, 2007Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7268067Abstract: Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.Type: GrantFiled: August 30, 2004Date of Patent: September 11, 2007Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7262074Abstract: An apparatus and method may be used for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with a plurality of discrete adhesive elements so as to provide a gap or standoff therebetween. Wire bonds may then be formed between bond pads on the semiconductor die to conductive pads or terminals on the carrier substrate. With this arrangement, a dielectric filler material is disposed in the gap or standoff to form a permanent bonding agent between the semiconductor die and the carrier substrate. By applying the dielectric filler material after forming the wire bonds, the dielectric filler material coats at least a portion of the wire bonds to stabilize the wire bonds and prevent wire sweep in an encapsulation process, such as transfer molding, performed thereafter.Type: GrantFiled: July 8, 2002Date of Patent: August 28, 2007Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7116000Abstract: An apparatus and method for packaging a semiconductor die and a carrier substrate to substantially prevent trapped moisture therebetween and provide a robust, inflexible cost-effective bond. The semiconductor die is attached to the carrier substrate with a plurality of discrete adhesive elements so as to provide a gap or standoff therebetween. Wire bonds may then be formed between bond pads on the semiconductor die to conductive pads or terminals on the carrier substrate. With this arrangement, a dielectric filler material is disposed in the gap or standoff to form a permanent bonding agent between the semiconductor die and the carrier substrate. By applying the dielectric filler material after forming the wire bonds, the dielectric filler material coats at least a portion of the wire bonds to stabilize the wire bonds and prevent wire sweep in an encapsulation process, such as transfer molding, performed thereafter.Type: GrantFiled: February 24, 2004Date of Patent: October 3, 2006Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Cary J. Baerlocher
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Patent number: 7084515Abstract: An electronic device package is described that includes a non-metal die attached adhesive. The die attach is positioned in discrete positions on a surface to which the die will be fixed. The die is placed on the discrete die attach. The die attach, in an embodiment, is an epoxy resin or other material that is cured. After curing, the die is electrically connected to an external circuit. The volume between the die and surface is filled with an underfill. In an embodiment, underfill cross-links with the die attach.Type: GrantFiled: August 30, 2004Date of Patent: August 1, 2006Assignee: Micron, Technology Inc.Inventors: Jason L. Fuller, Frank L. Hall, Tongbi Jiang
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Patent number: 6987058Abstract: A semiconductor assembly includes at least one semiconductor die and a carrier substrate adhered and maintained in spaced-apart relation to one another by at least one adhesive element. Through an opening in the carrier substrate, the assembly has intermediate conductive elements extending between bond pads of the semiconductor die and contact pads of the carrier substrate. The carrier substrate has a dam formed around the contact pads. A dielectric filler material disposed between the semiconductor die and the carrier substrate at least partially fills the opening, is laterally contained by the dam, and encapsulates the intermediate conductive elements, as well as at least filling the space between the semiconductor die and carrier substrate and forming a fillet about the periphery of the semiconductor die.Type: GrantFiled: March 18, 2003Date of Patent: January 17, 2006Assignee: Micron Technology, Inc.Inventor: Frank L. Hall
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Patent number: 6969914Abstract: An electronic device package is described that includes a non-metal die attached adhesive. The die attach is positioned in discrete positions on a surface to which the die will be fixed. The die is placed on the discrete die attach. The die attach, in an embodiment, is an epoxy resin or other material that is cured. After curing, the die is electrically connected to an external circuit. The volume between the die and surface is filled with an underfill. In an embodiment, underfill cross-links with the die attach.Type: GrantFiled: August 29, 2002Date of Patent: November 29, 2005Assignee: Micron Technology, Inc.Inventors: Jason L. Fuller, Frank L. Hall, Tongbi Jiang
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Patent number: 6835592Abstract: A method and apparatus for assembling and packaging semiconductor die assemblies utilizes a coating element such as a wafer backside laminate formed on a backside of a semiconductor die. The coating element may be formed from a somewhat compressible and, optionally, resilient material, which seals against a surface of a mold cavity while the semiconductor die assembly is being encapsulated. In this manner, the coating element prevents encapsulant material from covering at least a portion of the backside of the semiconductor die to prevent encapsulant flashing over the backside and thus improve heat dissipation characteristics of the packaged semiconductor die during operation.Type: GrantFiled: May 24, 2002Date of Patent: December 28, 2004Assignee: Micron Technology, Inc.Inventors: Frank L. Hall, Todd O. Bolken
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Publication number: 20040217389Abstract: A method and apparatus for assembling and packaging semiconductor die assemblies utilizes a coating element such as a wafer back side laminate formed on a back side of a semiconductor die is disclosed. The coating element may be formed from a somewhat compressible and, optionally, resilient material, which seals against a surface of a mold cavity while the semiconductor die assembly is being encapsulated. In this manner, the coating element prevents encapsulant material from covering at least a portion of the back side of the semiconductor die to prevent encapsulant flashing over the back side and thus improve heat dissipation characteristics of the packaged semiconductor die during operation.Type: ApplicationFiled: June 9, 2004Publication date: November 4, 2004Inventors: Frank L. Hall, Todd O. Bolken