Patents by Inventor Frank Lei Ding
Frank Lei Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11418003Abstract: A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer.Type: GrantFiled: August 6, 2019Date of Patent: August 16, 2022Assignee: II-VI DELAWARE, INC.Inventors: Jianwei Mu, Frank Lei Ding, Tao Wu, Hongyu Deng, Maziar Amirkiai
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Patent number: 10816739Abstract: A resistance weldable cover for an OSA may include multiple walls, one or more supports, and an opening disposed in one of the walls. The walls may define an interior cavity within the walls. The one or more supports may extend from one or more of the walls. Each of the one or more supports may be weldable to a heat sink stiffener. The opening may be sized and shaped to receive at least a portion of a barrel such that optical signals are transmittable between the interior cavity and the barrel.Type: GrantFiled: October 11, 2019Date of Patent: October 27, 2020Assignee: II-VI Delaware Inc.Inventors: Frank Lei Ding, Maziar Amirkiai, Jianwei Mu, Hongyu Deng, Tao Wu
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Publication number: 20200116961Abstract: A resistance weldable cover for an OSA may include multiple walls, one or more supports, and an opening disposed in one of the walls. The walls may define an interior cavity within the walls. The one or more supports may extend from one or more of the walls. Each of the one or more supports may be weldable to a heat sink stiffener. The opening may be sized and shaped to receive at least a portion of a barrel such that optical signals are transmittable between the interior cavity and the barrel.Type: ApplicationFiled: October 11, 2019Publication date: April 16, 2020Inventors: Frank Lei Ding, Maziar Amirkiai, Jianwei Mu, Hongyu Deng, Tao Wu
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Publication number: 20190379176Abstract: A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer.Type: ApplicationFiled: August 6, 2019Publication date: December 12, 2019Inventors: Jianwei Mu, Frank Lei Ding, Tao Wu, Hongyu Deng, Maziar Amirkiai
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Patent number: 10374386Abstract: A chip may include a first substantially planar isolation layer with a first surface and a second surface opposite the first surface. The chip may include a first substantially planar conduction layer with a first surface positioned adjacent to the second surface of the first isolation layer and a second surface opposite the first surface. The chip may include a second substantially planar isolation layer with a first surface positioned adjacent to the second surface of the first conduction layer and a second surface opposite the first surface. The chip may include a second conduction layer etched on the second surface of the second isolation layer. The second conduction layer may include an anode trace, a cathode trace, and an optical transmitter positioned on the cathode trace. The chip may include one or more vias through the second isolation layer electrically coupling the anode trace with the first conduction layer.Type: GrantFiled: June 7, 2018Date of Patent: August 6, 2019Assignee: FINISAR CORPORATIONInventors: Jianwei Mu, Frank Lei Ding, Tao Wu, Hongyu Deng, Maziar Amirkiai
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Patent number: 10036861Abstract: In one embodiment, an optoelectronic assembly may include at least one transmitter or at least one receiver, a sleeve, a housing, a fiber stub, and a receptacle. The sleeve may define a sleeve opening sized and shaped to receive an optically transmissive portion of an optical fiber. The housing may define a housing cavity at least partially enclosing the transmitter or the receiver. The housing may include a lens port defining a lens port opening. The fiber stub may be positioned at least partially in the sleeve opening and the lens port opening. The receptacle may define a receptacle opening. The lens port, the sleeve and the fiber stub may be positioned at least partially in the receptacle opening.Type: GrantFiled: June 1, 2017Date of Patent: July 31, 2018Assignee: Finisar CorporationInventors: Frank Lei Ding, Maziar Amirkiai, Tao Wu, Hongyu Deng, Wendy Lau Pei Fen
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Publication number: 20160142147Abstract: A tunable laser transmitter configured in a small package subassembly coupled to a printed circuit board. The tunable laser transmitter includes a housing with a volume formed by exterior walls. An electrical input interface is positioned at the first end of the housing. A first and a second optical output interface is positioned at the second end of the housing, the first output being configured to transmit a modulated optical beam, and the second output configured to transmit a cw beam to the local oscillator of an external receiver.Type: ApplicationFiled: January 25, 2016Publication date: May 19, 2016Inventors: Andrew John Daiber, Frank Lei Ding
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Patent number: 9246595Abstract: A tunable laser transmitter configured in a small package subassembly coupled to a printed circuit board. The tunable laser transmitter includes a housing with a volume formed by exterior walls. An electrical input interface is positioned at the first end of the housing. A first and a second optical output interface is positioned at the second end of the housing, the first output being configured to transmit a modulated optical beam, and the second output configured to transmit a cw beam to the local oscillator of an external receiver.Type: GrantFiled: December 9, 2013Date of Patent: January 26, 2016Assignee: Neophotonics CorporationInventors: Andrew John Daiber, Frank Lei Ding
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Publication number: 20150162990Abstract: A tunable laser transmitter configured in a small package subassembly coupled to a printed circuit board. The tunable laser transmitter includes a housing with a volume formed by exterior walls. An electrical input interface is positioned at the first end of the housing. A first and a second optical output interface is positioned at the second end of the housing, the first output being configured to transmit a modulated optical beam, and the second output configured to transmit a cw beam to the local oscillator of an external receiver.Type: ApplicationFiled: December 9, 2013Publication date: June 11, 2015Applicant: Emcore CorporationInventors: Andrew John Daiber, Frank Lei Ding