Patents by Inventor Frank M. Steranka

Frank M. Steranka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5502316
    Abstract: A method of forming a light emitting diode (LED) includes providing a temporary growth substrate that is selected for compatibility with fabricating LED layers having desired mechanical characteristics. For example, lattice matching is an important consideration. LED layers are then grown on the temporary growth substrate. High crystal quality is thereby achieved, whereafter the temporary growth substrate can be removed. A second substrate is bonded to the LED layers utilizing a wafer bonding technique. The second substrate is selected for optical properties, rather than mechanical properties. Preferably, the second substrate is optically transparent and electrically conductive and the wafer bonding technique is carried out to achieve a low resistance interface between the second substrate and the LED layers. Wafer bonding can also be carried out to provide passivation or light-reflection or to define current flow.
    Type: Grant
    Filed: October 12, 1995
    Date of Patent: March 26, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Fred A. Kish, Frank M. Steranka, Dennis C. DeFevere, Virginia M. Robbins, John Uebbing
  • Patent number: 5376580
    Abstract: A method of forming a light emitting diode (LED) includes providing a temporary growth substrate that is selected for compatibility with fabricating LED layers having desired mechanical characteristics. For example, lattice matching is an important consideration. LED layers are then grown on the temporary growth substrate. High crystal quality is thereby achieved, whereafter the temporary growth substrate can be removed. A second substrate is bonded to the LED layers utilizing a wafer bonding technique. The second substrate is selected for optical properties, rather than mechanical properties. Preferably, the second substrate is optically transparent and electrically conductive and the wafer bonding technique is carried out to achieve a low resistance interface between the second substrate and the LED layers. Wafer bonding can also be carried out to provide passivation or light-reflection or to define current flow.
    Type: Grant
    Filed: March 19, 1993
    Date of Patent: December 27, 1994
    Assignee: Hewlett-Packard Company
    Inventors: Fred A. Kish, Frank M. Steranka, Dennis C. DeFevere, Virginia M. Robbins, John Uebbing
  • Patent number: 4965223
    Abstract: In a light emitting diode comprising a plurality of layers deposited on a substrate, the substrate is etched so as to reduce the area in which the substrate is attached to the plurality of layers. The reduction in the area of attachment results in less light being absorbed by the substrate and thus more total light shining forth from the light emitting diode.
    Type: Grant
    Filed: June 13, 1989
    Date of Patent: October 23, 1990
    Assignee: Hewlett-Packard Company
    Inventor: Frank M. Steranka
  • Patent number: 4920404
    Abstract: A light-emitting diode is mounted in the bottom of a cavity in a metal lead and the assembly is potted in a transparent plastic material. The walls of the cavity surround the sides of the light-emitting diode in sufficiently close proximity to effectively shield the light-emitting diode from thermal expansion stresses from the plastic potting material which would induce light output degradation. Such a cavity may be a right-circular cylinder with a diameter less than 75 micrometers greater than the largest transverse dimension of the light-emitting diode. The front face of the light-emitting diode may be flush or beneath the face of the metal lead for minimizing stress. The cavity may be deep enough that the front face of the light-emitting diode is closer to the bottom of the cavity than to its open end. The front face may protrude beyond the open end of the cavity and be surrounded by a reflective surface. The edges of the front face of the light-emitting diode may be beveled for minimizing stress.
    Type: Grant
    Filed: May 12, 1989
    Date of Patent: April 24, 1990
    Assignee: Hewlett-Packard Company
    Inventors: Dinesh C. Shrimali, Frank M. Steranka, Cheryl L. McLeod
  • Patent number: 4864369
    Abstract: A semiconductor light emitting heterostructure device is disclosed. The device comprises an n-type GaAs substrate, a first n-type laeyr of AlGaAs adjacent to the substrate, a second p-type light emitting AlGaAs layer adjacent to the first layer, and a third p-type AlGaAs layer suitable for bonding to an aluminum contact. The device starts with an n-type substrate which is more readily available and has a p-side up configuration which is more suitable for bonding to an aluminum contact.
    Type: Grant
    Filed: July 5, 1988
    Date of Patent: September 5, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Wayne L. Snyder, Dennis C. DeFevere, Frank M. Steranka, Chin-Wang Tu
  • Patent number: 4864371
    Abstract: In a light emitting diode comprising a plurality of layers deposited on a substrate, the substrate is etched so as to reduce the area in which the substrate is attached to the plurality of layers. The reduction in the area of attachment results in less light being absorbed by the substrate and thus more total light shining forth from the light emitting diode.
    Type: Grant
    Filed: November 18, 1987
    Date of Patent: September 5, 1989
    Assignee: Hewlett-Packard Company
    Inventor: Frank M. Steranka