Abstract: In a method for demodulating an analog FSK signal (FSKin), a current sample (Id(k);Idi) of the downconverted and digital inphase component is multiplied with a previous sample (Qd(k−1);Qdi−1) of the downconverted an digital orthogonal phase component. The product thereof is subtracted from the product obtained by multiplying a current sample of said orthogonal phase component (Qd(k); Qdi) with a previous sample (Id(k−1); Idi−1) of said inphase component. Said current and said previous samples of said inphase and said orthogonal phase components are spaced apart by the digital baseband signal period. In a variant method said current sample and said previous sample of said inphase and orthogonal phase component are spaced apart by an integer fraction (n) of said digital baseband signal period,whereby the steps of said method are repeated, thereby further adding consecutive values of the result Ri).

Abstract: A voltage controlled oscillator with automatic center frequency calibration. The frequency range of the oscillator is increased by switchable capacitor circuits which add or remove extra capacitors in parallel with the variable capacitor of the resonant circuit. Different voltage versus frequency characteristics are obtained. The switchable capacitor circuits are controlled by a detection circuit that sends a reset pulse to a feedback circuit of the VCO when a control voltage from the feedback circuit reaches predetermined low or high voltage limits of the characteristics. Upon reception of the reset pulse, the feedback circuit changes the control voltage from the reached limit into an intermediate voltage between the low and high voltage limits. The control voltage is reset in the middle of a voltage versus frequency characteristic onto which the output frequency is also centered. The VCO includes a selection circuit adapted to immediately change the value of the control voltage.

Abstract: In a method for demodulating an analog FSK signal (FSKin), a current sample (Id(k);Idi) of the downconverted and digital inphase component is multiplied with a previous sample (Qd(k−1);Qdi−1) of the downconverted an digital orthogonal phase component. The product thereof is subtracted from the product obtained by multiplying a current sample of said orthogonal phase component (Qd(k); Qdi) with a previous sample (Id(k−1); Idi−1) of said inphase component. Said current and said previous samples of said inphase and said orthogonal phase components are spaced apart by the digital baseband signal period. In a variant method said current sample and said previous sample of said inphase and orthogonal phase component are spaced apart by an integer fraction (n) of said digital baseband signal period,whereby the steps of said method are repeated, thereby further adding consecutive values of the result Ri).

Abstract: An integrated circuit (IC1) comprising functional logic (1) and Flash-EEPROM (2) coupled, via mixing devices (IMUX, OMUX), to connection pads (CP1, CP2), which are arranged into pad arrangements (PAD: PAD1, PAD2, PAD3, PAD4). Each pad arrangement (PAD) comprises two juxtaposed connection pads (CP1, CP2) interconnected electrically and having substantially the same design. In this way, many “probings” are possible on a same pad arrangement, while probing at most two times each connection pad thereof. By probing at most two times on a connection pad, a good “bondability” of the pad is assured. This is particularly useful in the present case of combined functional logic and the Flash-EEPROM where three probings are generally required for the flash test of the EEPROM, the digital test of the functional logical and the analog test of the latter.

Abstract: A voltage controlled oscillator with automatic center frequency calibration. The frequency range (FOUT) of the oscillator is increased because of the presence of switchable capacitor circuits (SW1, XC1; SW2, XC2) which add or remove extra capacitors (XC1; XC2) in parallel with the variable capacitor (CV) of the resonant circuit (CV, L). Different voltage versus frequency characteristics (CHL, CHM, CHH) are so obtained. The control of the switchable capacitor circuits is performed by a detection circuit (DET). The detection circuit is further adapted to send a reset pulse (RES) to a feedback circuit (FB) of the VCO when a control voltage (VCTRL), provided by the feedback circuit, reaches predetermined low (VTL) or high (VTH) voltage limits of the characteristics. Upon reception of the reset pulse, the feedback circuit changes the control voltage from the reached limit into an intermediate voltage (VTM) in the middle of the range between the low and the high voltage limits.

Abstract: A Packaged Integrated Circuit, for use in a radio frequency apparatus, the Packaged Integrated Circuit comprises one or more radio frequency components that are included in an Integrated Circuit die. The Integrated Circuit die is associated with a radio frequency antenna. The radio frequency antenna is also included in the Packaged Integrated Circuit but is excluded from the Integrated Circuit die.