Abstract: A method for transferring an atomically thin layer comprising providing a target substrate and a donor substrate on which a first atomically thin layer has been formed. The method further comprises disposing an adhesion layer at the donor substrate or at the target substrate. The method further comprises bringing the target substrate and the donor substrate together. Further, the method comprises bonding together the donor substrate, the adhesion layer and the target substrate and removing the donor substrate.

Abstract: Method and arrangement for assembling one or more microchips (415; 615; 715; 815; 915; 1015) into one or more holes (422; 722), respectively, in a substrate surface (421; 721) of a separate receiving substrate (420; 720; 820; 1020). The holes (422; 722) of the substrate is for microchip insertion out-of-plane in relation to said substrate surface. Each of said microchips is provided with a ferromagnetic layer (213; 613) of ferromagnetic material. The microchips are placed (503) on said substrate surface (421; 721) and it is applied and moved (504) one or more magnetic fields affecting said ferromagnetic layer (213; 613) of each microchip such that the microchips thereby become out-of-plane oriented in relation to said substrate surface (421; 721) and move over the substrate surface (421; 721) until assembled into said holes (422; 722).

Abstract: Disclosed is a method of making a crack structure on a substrate, the crack structure being usable as a tunnelling junction structure in a nanogap device, including the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements separated by nanogaps or crack-junctions. The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-??? to >25???, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from <2 nm to >100 nm. The nanogaps can be used for tunneling devices in combination with nanopores for DNA, RNA or peptides sequencing.

Abstract: The present invention relates to a method for forming a 3D optical component comprising the steps of: forming over a substrate a liquid layer of a polymer in a solvent, drying said polymer for removing at least a portion of said solvent and thereby creating a layer having a first dissolution rate, exposing by multi-photon absorption using an electromagnetic radiation source a predefined volume of said layer, thereby causing the volume to have a second dissolution rate which is different to said first dissolution rate, dissolve the non-exposed areas with a liquid solution for forming the 3D optical component, wherein said polymer is Hydrogen silsesquioxane, HSQ, and said dried layer having a thickness of at least 1 ?m.

Abstract: A method for transferring an atomically thin layer comprising providing a target substrate and a donor substrate on which a first atomically thin layer has been formed. The method further comprises disposing an adhesion layer at the donor substrate or at the target substrate. The method further comprises bringing the target substrate and the donor substrate together. Further, the method comprises bonding together the donor substrate, the adhesion layer and the target substrate and removing the donor substrate.

Abstract: In an embodiment a device includes a device layer, a substrate defining a substrate plane extending through a point of the substrate being closest to the device layer, a waveguide configured to guide an electromagnetic wave, wherein the waveguide extends in a length direction in the device layer, and wherein the waveguide has a width in a device layer plane in a direction perpendicular to the length direction and a height out of the device layer plane in the direction perpendicular to the length direction and a support structure, wherein the support structure extends from the substrate to the device layer to support the waveguide on the substrate.

Abstract: A method of making a crack structure on a substrate, and usable as a tunnelling junction structure in a nanogap device. Such nanogap devices are in turn usable in a number of applications, notably in devices for so called quantum sequencing of DNA molecules. The method includes the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements, e.g. cantilevering parts or electrodes, separated by nanogaps, so-called crack structures, or crack-junctions (CJs). The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge that is patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-??? to >25???, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from <2 nm to >100 nm.

Abstract: Disclosed is a method of making a crack structure on a substrate, the crack structure being usable as a tunnelling junction structure in a nanogap device, including the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements separated by nanogaps or crack-junctions. The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-??? to >25 ???, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from <2 nm to >100 nm. The nanogaps can be used for tunneling devices in combination with nanopores for DNA, RNA or peptides sequencing.

Abstract: Disclosed is a method of making a crack structure on a substrate, the crack structure being usable as a tunneling junction structure in a nanogap device, including the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements separated by nanogaps or crack-junctions. The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-??? to >25???, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from <2 nm to >100 nm. The nanogaps can be used for tunneling devices in combination with nanopores for DNA, RNA or peptides sequencing.

Abstract: Disclosed is a method of making a crack structure on a substrate, the crack structure being usable as a tunneling junction structure in a nanogap device, including the controlled fracture or release of a patterned layer under built-in stress, thereby forming elements separated by nanogaps or crack-junctions. The width of the crack-defined nanogap is controlled by locally release-etching the film at a notched bridge patterned in the film. The built-in stress contributes to forming the crack and defining of the width of the crack-defined nanogap. Further, by design of the length of the bridge in a range between sub-??? to >25???, the separation between the elements, defined by the width of the crack-defined nanogaps, can be controlled for each individual crack structure from <2 nm to >100 nm. The nanogaps can be used for tunneling devices in combination with nanopores for DNA, RNA or peptides sequencing.

Abstract: The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.

Abstract: A method is disclosed for forming conductive vias in a substrate by filling preformed via holes, preferably through via holes, with conductive material. The method includes providing a plurality of preformed objects at least partly including ferromagnetic material on a surface of the substrate; providing a magnetic source on an opposite side of the substrate with respect to the plurality of preformed objects, thereby at least partly aligning at least a portion of the preformed objects with a magnetic field associated with the magnetic source; and moving the magnetic source relative the substrate, or vice versa, thereby moving the at least portion of the preformed objects into at least a portion of the via holes.

Abstract: A method for at least partially inserting a plug into a hole, said method comprising the steps of a) providing a at least one substrate with at least one hole wherein said at least one hole has a largest dimension of from 1 ?m to 300 ?m, b) providing a piece of material, wherein said piece of material has a larger dimension than said at least one hole, c) pressing said piece of material against the hole with a tool so that a plug is formed, wherein at least a part of said piece of material is pressed into said hole, d) removing the tool from the piece of material. There is further disclosed a plugged hole manufactured with the method. One advantage of an embodiment is that an industrially available wire bonding technology can be used to seal various cavities. The existing wire bonding technology makes the plugging fast and cheap.

Abstract: Embodiments provide a MEMS including a MEMS device and an detector circuit. The MEMS device includes a membrane, wherein a material of the membrane comprises a band gap and a crystal structure with structural elements (unit cells) connected by covalent bonds in two dimensions only. The detector circuit is configured to determine a deformation of the membrane based on a piezoresistive resistance of the material of the membrane.

Abstract: The present invention relates to a method to attach a shape memory alloy wire to a substrate, where the wire is mechanically attached into a 3D structure on the substrate. The present invention also relates to a device comprising a shape memory alloy wire attached to a substrate, where the wire is mechanically attached into a 3D structure on the substrate.

Abstract: A method is disclosed for forming conductive vias in a substrate by filling preformed via holes, preferably through via holes, with conductive material. The method includes providing a plurality of preformed objects at least partly including ferromagnetic material on a surface of the substrate; providing a magnetic source on an opposite side of the substrate with respect to the plurality of preformed objects, thereby at least partly aligning at least a portion of the preformed objects with a magnetic field associated with the magnetic source; and moving the magnetic source relative the substrate, or vice versa, thereby moving the at least portion of the preformed objects into at least a portion of the via holes.

Abstract: A method of making a three-dimensional structure in semiconductor material includes providing a substrate (20) is provided having at least a surface including semiconductor material. Selected areas of the surface of the substrate are exposed to a focussed ion beam whereby the ions are implanted in the semiconductor material in the selected areas. Several layers of a material selected from the group consisting of mono-crystalline, poly-crystalline or amorphous semiconductor material, are deposited on the substrate surface and between depositions focussed ion beam is used to expose the surface so as to define a three-dimensional structure. Material not part of the final structure (30) defined by the focussed ion beam is etched away so as to provide a three-dimensional structure on the substrate (20).

Abstract: A method for at least partially inserting a plug into a hole, said method comprising the steps of a) providing a at least one substrate with at least one hole wherein said at least one hole has a largest dimension of from 1 ?m to 300 ?m, b) providing a piece of material, wherein said piece of material has a larger dimension than said at least one hole, c) pressing said piece of material against the hole with a tool so that a plug is formed, wherein at least a part of said piece of material is pressed into said hole, d) removing the tool from the piece of material. There is further disclosed a plugged hole manufactured with the method. One advantage of an embodiment is that an industrially available wire bonding technology can be used to seal various cavities. The existing wire bonding technology makes the plugging fast and cheap.

Abstract: A method of combining components to form an integrated device, wherein the components are provided on a first sacrificial wafer, and a second non-sacrificial wafer, respectively. The sacrificial wafer carries a first plurality of components and the non-sacrificial wafer carries a second plurality of components. The wafers are bonded together with an intermediate bonding material. Optionally the sacrificial wafer is thinned to a desired level. The components of the sacrificial wafer are electrically interconnected to the component(s) on the non-sacrificial wafer. Finally, optionally the intermediate bonding material is stripped away.

Abstract: A method of combining components to form an integrated device, wherein at least one first component is provided on a first surface of a sacrificial substrate, and at least one second component is provided on a first surface of a non-sacrificial substrate. At least one support structure is formed on at least one of the first surfaces of the sacrificial substrate, and the non-sacrificial substrate, respectively, such that said at least one support structure is extended outwardly from at least one of the first surfaces. The sacrificial substrate carrying the first component, and the non-sacrificial substrate carrying the second component, respectively, are bonded, so that the first and second surfaces will be facing one another with a distance defined by a thickness of the support structure. At least a part of the sacrificial substrate is removed. The first component and second components are interconnected.