Abstract: A method for analog-to-digital conversion is provided using successive approximation and a plurality of capacitors including a first set of capacitors and a second set of capacitors, a first side of each of the plurality of capacitors being coupled to a common node. The method includes sampling an input voltage on the first set of capacitors, after the step of sampling leaving a side of at least one capacitor of the first set of capacitors floating, coupling a capacitor of the first set of capacitors, which is not floating, with a capacitor of the second set of capacitors so as to redistribute the charge on the coupled capacitors, comparing the voltage on the common node with a comparator reference voltage level to receive a comparison result to be used for a bit decision, and switching the floating side of the floating capacitor of the first set of capacitors to either a first reference voltage or a second reference voltage in accordance with the bit decision.

Abstract: A method for analog-to-digital conversion is provided using successive approximation and a plurality of capacitors comprising a first set of capacitors and a second set of capacitors, a first side of each of the plurality of capacitors being coupled to a common node. The method comprises sampling an input voltage on the first set of capacitors, after the step of sampling leaving a side of at least one capacitor of the first set of capacitors floating, coupling a capacitor of the first set of capacitors, which is not floating, with a capacitor of the second set of capacitors so as to redistribute the charge on the coupled capacitors, comparing the voltage on the common node with a comparator reference voltage level to receive a comparison result to be used for a bit decision, and switching the floating side of the floating capacitor of the first set of capacitors to either a first reference voltage or a second reference voltage in accordance with the bit decision.

Abstract: A window comparator comprising a single comparator circuit that has a positive input, a differential negative input, and an output, wherein limits of a window are defined by a reference voltage and a window condition is defined for a differential voltage between a positive input voltage and a negative input voltage so that the differential voltage is within the limits of the window; including a common mode voltage, a first set of two switched capacitors connected to the positive comparator input, a second set of two switched capacitors connected to the negative comparator input, a switching array capable of assuming a plurality of different switching conditions, and detecting the output of the comparator in relation to the switching conditions of the switching array.

Abstract: A method of providing a window comparator function with a single comparator unit that has a positive input cp, a differential negative input (cn) and an output (cout), wherein limits of a window are defined by a reference voltage (Vref) and a window condition is defined for a differential voltage between a positive input voltage (Vinp) and a negative input voltage (Vinn) so that the differential voltage is within the limits of the window, comprises the steps of providing a common mode voltage (Vmid), providing a first set of two switched capacitors (C1p, C2p) each of which has a first electrode connected to the positive input cp of the comparator unit, providing a second set of two switched capacitors (C1n, C2n) each of which has a first electrode connected to the negative input (cn) of the comparator unit, and providing a switching array capable of assuming a plurality of different switching conditions.