Patents by Inventor Frank Pan
Frank Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11736391Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: GrantFiled: May 10, 2021Date of Patent: August 22, 2023Assignee: NICIRA, INC.Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Patent number: 11172882Abstract: A wearable device includes one or more sensors of information from a subject. The wearable device may have an electronic assembly supported by a base. The electronic assembly may include a sensor data collection system configured to control collection of sensor data related to one or more characteristics of a subject and one or more processors. the sensor data collection system may include a controller configured to control sequencing and scheduling of the sensor data collection, and a buffer configured to receive and buffer data corresponding to the sensor data collected from the one or more sensors in accordance with a signal provided by the controller. The one or more processors may be configured to receive the buffered data from the buffer in accordance with a wake signal; process the received data; and output the processed data.Type: GrantFiled: September 5, 2018Date of Patent: November 16, 2021Assignee: Vital Connect, Inc.Inventors: Ashwin Upadhya, Frank Pan
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Publication number: 20210281508Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: ApplicationFiled: May 10, 2021Publication date: September 9, 2021Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Patent number: 11113085Abstract: A method of defining a virtual network across a plurality of physical hosts is provided. At least two hosts utilize network virtualization software provided by two different vendors. Each host hosts a set of data compute nodes (DCNs) for one or more tenants. The method, at an agent at a host, receives a command from a network controller, the command includes (i) an identification a resource on a tenant logical network and (ii) an action to perform on the identified resource. The method, at the agent, determines the network virtualization software utilized by the host. The method, at the agent, translates the received action into a set of configuration commands compatible with the network virtualization software utilized by the host. The method sends the configuration commands to a network configuration interface on the host to perform the action on the identified resource.Type: GrantFiled: January 25, 2016Date of Patent: September 7, 2021Assignee: NICIRA, INC.Inventors: Bolt Zhang, Jianjun Shen, Jianwei Ma, Donghai Han, Ram D. Singh, Frank Pan
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Patent number: 11005753Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: GrantFiled: February 14, 2019Date of Patent: May 11, 2021Assignee: NICIRA, INC.Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Publication number: 20200069252Abstract: A wearable device includes one or more sensors of information from a subject. The wearable device may have an electronic assembly supported by a base. The electronic assembly may include a sensor data collection system configured to control collection of sensor data related to one or more characteristics of a subject and one or more processors. the sensor data collection system may include a controller configured to control sequencing and scheduling of the sensor data collection, and a buffer configured to receive and buffer data corresponding to the sensor data collected from the one or more sensors in accordance with a signal provided by the controller. The one or more processors may be configured to receive the buffered data from the buffer in accordance with a wake signal; process the received data; and output the processed data.Type: ApplicationFiled: September 5, 2018Publication date: March 5, 2020Inventors: Ashwin Upadhya, Frank Pan
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Publication number: 20190253346Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: ApplicationFiled: February 14, 2019Publication date: August 15, 2019Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Patent number: 10243846Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: GrantFiled: May 15, 2017Date of Patent: March 26, 2019Assignee: NICIRA, INC.Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Publication number: 20180331948Abstract: For a managed network including multiple host machines implementing multiple logical networks, some embodiments provide a method that reduces the memory and traffic load required to implement the multiple logical networks. The method generates configuration data for each of multiple host machines including (i) data to configure a host machine to implement a set of logical forwarding elements that belong to a set of routing domains and (ii) identifiers for each routing domain in the set of routing domains. The method then receives data regarding tunnels endpoints operating on each of the host machines and an association with the routing identifiers sent to the host machines. The method then generates a routing domain tunnel endpoint list for each routing domain based on the data received from each of the host machines including a list of the tunnel endpoints associated with the routing domain which the host machines can use to facilitate packet processing.Type: ApplicationFiled: May 15, 2017Publication date: November 15, 2018Inventors: Caixia Jiang, Jianjun Shen, Pankaj Thakkar, Anupam Chanda, Ronghua Zhang, Ganesan Chandrashekhar, Vicky Liu, Da Wan, Frank Pan, Hua Wang, Donghai Han
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Patent number: 9832112Abstract: Multiple TCP/IP stack processors on a host. The multiple TCP/IP stack processors are provided independently of TCP/IP stack processors implemented by virtual machines on the host. The TCP/IP stack processors provide multiple different default gateway addresses for use with multiple processes. The default gateway addresses allow a service to communicate across an L3 network. Processes outside of virtual machines that utilize the TCP/IP stack processor on a first host can benefit from using their own gateway, and communicate with their peer process on a second host, regardless of whether the second host is located within the same subnet or a different subnet. The multiple TCP/IP stack processors can use separately allocated resources. Separate TCP/IP stack processors can be provided for each of multiple tenants on the host. Separate loopback interfaces of multiple TCP/IP stack processors can be used to create separate containment for separate sets of processes on a host.Type: GrantFiled: March 31, 2014Date of Patent: November 28, 2017Assignee: NICIRA, INC.Inventors: Nithin B. Raju, Ganesan Chandrashekhar, Frank Pan, Tihomir Varbanov, Tony Ganchev
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Patent number: 9621290Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: GrantFiled: March 29, 2016Date of Patent: April 11, 2017Assignee: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
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Publication number: 20170093754Abstract: A method of defining a virtual network across a plurality of physical hosts is provided. At least two hosts utilize network virtualization software provided by two different vendors. Each host hosts a set of data compute nodes (DCNs) for one or more tenants. The method, at an agent at a host, receives a command from a network controller, the command includes (i) an identification a resource on a tenant logical network and (ii) an action to perform on the identified resource. The method, at the agent, determines the network virtualization software utilized by the host. The method, at the agent, translates the received action into a set of configuration commands compatible with the network virtualization software utilized by the host. The method sends the configuration commands to a network configuration interface on the host to perform the action on the identified resource.Type: ApplicationFiled: January 25, 2016Publication date: March 30, 2017Inventors: Bolt Zhang, Jianjun Shen, Jianwei Ma, Donghai Han, Ram D. Singh, Frank Pan
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Publication number: 20160211937Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: ApplicationFiled: March 29, 2016Publication date: July 21, 2016Applicant: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
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Patent number: 9319164Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: GrantFiled: July 17, 2013Date of Patent: April 19, 2016Assignee: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
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Publication number: 20150281047Abstract: Multiple TCP/IP stack processors on a host. The multiple TCP/IP stack processors are provided independently of TCP/IP stack processors implemented by virtual machines on the host. The TCP/IP stack processors provide multiple different default gateway addresses for use with multiple processes. The default gateway addresses allow a service to communicate across an L3 network. Processes outside of virtual machines that utilize the TCP/IP stack processor on a first host can benefit from using their own gateway, and communicate with their peer process on a second host, regardless of whether the second host is located within the same subnet or a different subnet. The multiple TCP/IP stack processors can use separately allocated resources. Separate TCP/IP stack processors can be provided for each of multiple tenants on the host. Separate loopback interfaces of multiple TCP/IP stack processors can be used to create separate containment for separate sets of processes on a host.Type: ApplicationFiled: March 31, 2014Publication date: October 1, 2015Inventors: Nithin B. Raju, Ganesan Chandrashekhar, Frank Pan, Tihomir Varbanov, Tony Ganchev
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Patent number: 8670459Abstract: An apparatus and method of scheduling timing packets to enhance time distribution includes an improved apparatus in a system in which at least one of time and frequency information is derived based on information distributed in timing packets, at least some of the timing packets being transmitted by or received by the apparatus. The improvement includes a scheduling module that determines a first packet transmission time offset of a first timing packet based on a first predetermined identifier associated with the apparatus, and a second packet transmission time offset of a second timing packet based on the first packet transmission time offset and a timing packet spacing that is independent of the first predetermined identifier. The improvement further includes a transmission module that transmits the first timing packet based on the first packet transmission time offset, and the second timing packet based on the second packet transmission time offset.Type: GrantFiled: November 30, 2009Date of Patent: March 11, 2014Assignee: Juniper Networks, Inc.Inventors: Charles Frederick Barry, Tian (Alan) Shen, Feng Frank Pan, DeviPrasad Natesan
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Publication number: 20130301660Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: ApplicationFiled: July 17, 2013Publication date: November 14, 2013Applicant: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
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Patent number: 8494011Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: GrantFiled: September 13, 2012Date of Patent: July 23, 2013Assignee: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian Alan Shen, Philip Kruzinski, Guochun George Zhao, DeviPrasad Natesan, David R. Jorgensen
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Publication number: 20130010815Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: ApplicationFiled: September 13, 2012Publication date: January 10, 2013Applicant: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian (Alan) Shen, Philip Kruzinski, Guochun (George) Zhao, DeviPrasad Natesan, David R. Jorgensen
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Patent number: 8270438Abstract: An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.Type: GrantFiled: August 30, 2011Date of Patent: September 18, 2012Assignee: Juniper Networks, Inc.Inventors: Charles F. Barry, Meenakshi S. Subramanian, Feng Frank Pan, Tian Alan Shen, Philip Kruzinski, Guochun George Zhao, DeviPrasad Natesan, David R. Jorgensen