Abstract: The present invention provides a manufacturing method for forming an integrated circuit device and to a corresponding integrated circuit device. The manufacturing method for forming an integrated circuit device comprises the steps of: forming a first level on a substrate; forming a second level above the first level; forming a cap layer on the second level which covers a first region of the level and leaves a second region uncovered; and simultaneously etching a first contact hole in the first region and a second contact hole in the second region such that the etching is selective to the cap layer in the second region and proceeds to a greater depth in the first region.

Abstract: The present invention provides a manufacturing method for forming an integrated circuit device and to a corresponding integrated circuit device. The manufacturing method for forming an integrated circuit device comprises the steps of: forming a first level on a substrate; forming a second level above the first level; forming a cap layer on the second level which covers a first region of the level and leaves a second region uncovered; and simultaneously etching a first contact hole in the first region and a second contact hole in the second region such that the etching is selective to the cap layer in the second region and proceeds to a greater depth in the first region.

Abstract: A semiconductor test device. In one embodiment, the test device includes a drill bit. The test device is configured to rotate the drill bit, at least after contacting the semiconductor device, for penetrating into the semiconductor device.

Abstract: A probe needle for testing semiconductor chips includes one end that is fixed in a holding element and a free end that includes a contact tip. The probe needle is provided—at least on the surface of the contact tip—with a layer consisting of a chemically inert, electroconductive material which is hard in relation to the material of contact surfaces of the semiconductor chips. For example, the layer can be titanium nitride.

Abstract: A probe needle for testing semiconductor chips includes one end that is fixed in a holding element and a free end that includes a contact tip. The probe needle is provided—at least on the surface of the contact tip—with a layer consisting of a chemically inert, electroconductive material which is hard in relation to the material of contact surfaces of the semiconductor chips. For example, the layer can be titanium nitride.

Abstract: A wafer test apparatus for bringing the contact areas of the integrated circuits to be tested into electrical connection with the test contacts as uniformly as possible and therefore with relatively low necessary contact pressures. The test apparatus has a chuck for holding a wafer having at least one integrated circuit with a group of contact areas which define a wafer surface profile. A test head is configured opposite the chuck and has a performance board, on which a probe card with contacts for making contact with the contact areas of the integrated circuit is configured. Areas of the contacts, of the probe card, which are intended to come into contact with the contact areas define a test surface profile. Actuators are configured on the probe card for aligning the test surface profile in parallel with the wafer surface profile and for changing the distance between the performance board and the contacts in a direction substantially orthogonal to the wafer surface profile.

Abstract: A wafer test apparatus for bringing the contact areas of the integrated circuits to be tested into electrical connection with the test contacts as uniformly as possible and therefore with relatively low necessary contact pressures. The test apparatus has a chuck for holding a wafer having at least one integrated circuit with a group of contact areas which define a wafer surface profile. A test head is configured opposite the chuck and has a performance board, on which a probe card with contacts for making contact with the contact areas of the integrated circuit is configured. Areas of the contacts, of the probe card, which are intended to come into contact with the contact areas define a test surface profile. Actuators are configured on the probe card for aligning the test surface profile in parallel with the wafer surface profile and for changing the distance between the performance board and the contacts in a direction substantially orthogonal to the wafer surface profile.