Patents by Inventor Frank Poag

Frank Poag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7601629
    Abstract: The invention provides a method of fabricating a semiconductive device [200]. In this embodiment, the method comprises depositing a hydrocarbon layer [294] over a semiconductive substrate, forming an interconnect structure [295, 297] within the hydrocarbon layer [294], and removing the hydrocarbon layer [294] by sublimation.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: October 13, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Deepak A. Ramappa, Richard L. Guldi, Asad Haider, Frank Poag
  • Publication number: 20070141829
    Abstract: The invention provides a method of fabricating a semiconductive device [200]. In this embodiment, the method comprises depositing a hydrocarbon layer [294] over a semiconductive substrate, forming an interconnect structure [295, 297] within the hydrocarbon layer [294], and removing the hydrocarbon layer [294] by sublimation.
    Type: Application
    Filed: December 20, 2005
    Publication date: June 21, 2007
    Applicant: Texas Instruments, Incorporated
    Inventors: Deepak Ramappa, Richard Guldi, Asad Haider, Frank Poag
  • Patent number: 5839455
    Abstract: Methods and apparatus are providing for cleansing contaminants from substrates, such as semiconductor wafer handling implements, and thereby reduce the incidence of contamination of semiconductor devices being assembled upon the semiconductor wafers.In one aspect of the invention, a substrate such as a semiconductor cassette or other semiconductor wafer handling implement, is inserted into a chamber that is substantially isolated from a surrounding environment. A pressurized, and optionally purified, cleansing medium is directed against at least one surface of the substrate to dislodge contaminants from the substrate surface. Dislodged contaminants are evacuated with negative pressure from the chamber. In a preferred aspect of the invention, the cleansing medium is an inert gas, such as nitrogen, and is applied to the substrate at a pressure from about 10 p.s.i. to about 100 or more p.s.i.
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: November 24, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Virgil Q. Turner, William D. Light, Hilario T. Trevino, Richard L. Guldi, Frank Poag, Douglas E. Paradis
  • Patent number: 5551165
    Abstract: Methods are providing for cleansing contaminants from substrates, such as semiconductor wafer handling implements, and thereby reduce the incidence of contamination of semiconductor devices being assembled upon the semiconductor wafers. In one aspect of the invention, a substrate such as a semiconductor cassette or other semiconductor wafer handling implement, is inserted into a chamber that is substantially isolated from a surrounding environment. A pressurized, and optionally purified, cleansing medium is directed against at least one surface of the substrate to dislodge contaminants from the substrate surface. Dislodged contaminants are evacuated with negative pressure from the chamber. In a preferred aspect of the invention, the cleansing medium is an inert gas, such as nitrogen, and is applied to the substrate at a pressure from about 10 p.s.i. to about 100 or more p.s.i.
    Type: Grant
    Filed: April 13, 1995
    Date of Patent: September 3, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Virgil Q. Turner, William D. Light, Hilario T. Trevino, Richard L. Guldi, Frank Poag, Douglas E. Paradis
  • Patent number: 4720997
    Abstract: The electronic monitor includes a level-sensing circuit, a reference circuit, a comparator circuit, and a logic circuit. The level sensing-circuit includes at least one level sensor positioned within the reservoir adjacent to and below a predetermined level. The reference circuit includes a reference sensor positioned in the air adjacent to the maximum allowed level for the material. A current source applies current to all the sensors. The comparator circuit compares the voltage across the reference sensor and the voltage across the level sensor and provides a difference voltage to a logic circuit that activates selective signaling devices depended upon the level of the monitored material. The sensors are preferably negative-coefficient thermistors.
    Type: Grant
    Filed: December 1, 1986
    Date of Patent: January 26, 1988
    Inventors: Roni K. Doak, Frank Poag