Abstract: A stress shield for a plastic integrated circuit package is disclosed. A shield plate is attached by an adhesive to a top surface of an integrated circuit die such that the shield plate covers less than all of the top surface and leaves bond pads exposed. A molding material is applied over the shield plate and the integrated circuit die. The shield plate shields the integrated circuit die from stresses imparted by the molding material.

Abstract: Physical layouts of ratioed circuit elements, such as transistors, are disclosed. Such layouts can maintain electrical characteristics of the ratioed circuit elements relative to one another in the presence of mechanical stresses applied to an integrated circuit, such as an integrated circuit encapsulated in plastic. The ratioed circuit elements can include first and second composite circuit elements formed of first and second groups of circuit elements, respectively, arranged around a center point. The first group of circuit elements can be arranged on a grid and the second group of circuit elements can include four circuit elements spaced approximately the same distance from the center point. Each of the circuit elements in the second group can be off the grid in at least one dimension. The first and second groups of circuit elements can be arranged around a perimeter of dummy circuit elements in some embodiments.

Abstract: Physical layouts of ratioed circuit elements, such as transistors, are disclosed. Such layouts can maintain electrical characteristics of the ratioed circuit elements relative to one another in the presence of mechanical stresses applied to an integrated circuit, such as an integrated circuit encapsulated in plastic. The ratioed circuit elements can include first and second composite circuit elements formed of first and second groups of circuit elements, respectively, arranged around a center point. The first group of circuit elements can be arranged on a grid and the second group of circuit elements can include four circuit elements spaced approximately the same distance from the center point. Each of the circuit elements in the second group can be off the grid in at least one dimension. The first and second groups of circuit elements can be arranged around a perimeter of dummy circuit elements in some embodiments.

Abstract: A stress shield for a plastic integrated circuit package is disclosed. A shield plate is attached by an adhesive to a top surface of an integrated circuit die such that the shield plate covers less than all of the top surface and leaves bond pads exposed. A molding material is applied over the shield plate and the integrated circuit die. The shield plate shields the integrated circuit die from stresses imparted by the molding material.

Abstract: An integrated circuit chip, useful as an electronic thermostat, comprises a temperature sensor for providing a signal corresponding to ambient temperature. A digital counter contains a value which, after digital-to-analog conversion by a DAC, corresponds to a desired trip temperature. A comparator has an output which changes state when the magnitude of the sensor signal exceeds the output of the DAC. The value in the counter is set by maintaining the sensor at a desired trip temperature and incrementing the counter until the comparator changes state.

Abstract: An integrated circuit chip, useful as an electronic thermostat, comprises a temperature sensor for providing a signal corresponding to ambient temperature. A digital counter contains a value which, after digital-to-analog conversion by a DAC, corresponds to a desired trip temperature. A comparator has an output which changes state when the magnitude of the sensor signal exceeds the output of the DAC. The value in the counter is set by maintaining the sensor at a desired trip temperature and incrementing the counter until the comparator changes state.

Abstract: An integrated-circuit (IC) chip formed with a fault-protected switch comprising three MOS transistors in series. An additional MOS transistor is formed adjacent the center one of the three transistors, and is arranged such that the gates of the two transistors are connected together, the source electrodes of the two transistors are connected together, the backgates form a common region, and the drain of the additional transistor is connected to those backgates.

Abstract: An integrated-circuit (IC) chip formed with a fault-protected switch comprising three MOS transistors in series. Each transistor is placed in a corresponding tub of the IC chip. Each of these tubs is electrically isolated from all other sections of the IC chip, so that the MOS transistors are isolated from one another and from the chip voltage supplies.